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authorMarek Olšák <[email protected]>2017-02-09 02:18:40 +0100
committerMarek Olšák <[email protected]>2017-02-10 11:27:50 +0100
commit3a534c5c7d84f2b16bde3057f785cb061e347342 (patch)
treeabc538d46d881390bf9f5c2513f4b9b8931472c5 /src/gallium
parent1a392a43779b4e5650eed54cd149cea9a6b0a2a0 (diff)
radeonsi: align shader binaries to CP DMA alignment for optimal prefetch
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/radeonsi/si_shader.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index eb2efbb72c4..7b89014d5ba 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -5748,7 +5748,8 @@ int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader)
r600_resource_reference(&shader->bo, NULL);
shader->bo = (struct r600_resource*)
pipe_buffer_create(&sscreen->b.b, 0,
- PIPE_USAGE_IMMUTABLE, bo_size);
+ PIPE_USAGE_IMMUTABLE,
+ align(bo_size, SI_CPDMA_ALIGNMENT));
if (!shader->bo)
return -ENOMEM;