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authorTim Rowley <[email protected]>2017-05-15 12:33:21 -0500
committerTim Rowley <[email protected]>2017-05-30 17:21:18 -0500
commit7be26a2d35c2e91fd9f3195b012c163d562eb9df (patch)
tree81f11179cb523a5dcb0c48bc6c35ee3e66df68c8 /src/gallium
parente3c93d8ddf2bd8b427396e1320fcd65fb44467e8 (diff)
swr/rast: SIMD16 FE - add SIMD16 types to jitter
Reviewed-by: Bruce Cherniak <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py4
-rw-r--r--src/gallium/drivers/swr/rasterizer/core/frontend.h8
-rw-r--r--src/gallium/drivers/swr/rasterizer/core/state.h9
3 files changed, 11 insertions, 10 deletions
diff --git a/src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py b/src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py
index 4cabde3394f..c1533687c9d 100644
--- a/src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py
+++ b/src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_types.py
@@ -71,7 +71,9 @@ def gen_llvm_type(type, name, is_pointer, is_pointer_pointer, is_array, is_array
elif type == 'SIMD16::vectori_t':
llvm_type = 'VectorType::get(Type::getInt32Ty(ctx), 16)'
elif type == 'simdvector':
- llvm_type = 'ArrayType::get(VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth), 4)'
+ llvm_type = 'ArrayType::get(VectorType::get(Type::getFloatTy(ctx), 8), 4)'
+ elif type == 'simd16vector':
+ llvm_type = 'ArrayType::get(VectorType::get(Type::getFloatTy(ctx), 16), 4)'
elif type == 'SIMD8::attrib_t':
llvm_type = 'ArrayType::get(VectorType::get(Type::getFloatTy(ctx), 8), 4)'
elif type == 'SIMD16::attrib_t':
diff --git a/src/gallium/drivers/swr/rasterizer/core/frontend.h b/src/gallium/drivers/swr/rasterizer/core/frontend.h
index 1ce51bbd5df..eedbcfcf7b6 100644
--- a/src/gallium/drivers/swr/rasterizer/core/frontend.h
+++ b/src/gallium/drivers/swr/rasterizer/core/frontend.h
@@ -30,14 +30,6 @@
#include "context.h"
#include <type_traits>
-#if ENABLE_AVX512_SIMD16
-// TODO: this belongs in state.h alongside the simdvector definition, but there is a llvm codegen issue
-struct simd16vertex
-{
- simd16vector attrib[SWR_VTX_NUM_SLOTS];
-};
-
-#endif
// Calculates the A and B coefficients for the 3 edges of the triangle
//
// maths for edge equations:
diff --git a/src/gallium/drivers/swr/rasterizer/core/state.h b/src/gallium/drivers/swr/rasterizer/core/state.h
index bf735e03f24..8812fbaab5f 100644
--- a/src/gallium/drivers/swr/rasterizer/core/state.h
+++ b/src/gallium/drivers/swr/rasterizer/core/state.h
@@ -197,9 +197,16 @@ enum SWR_VTX_SLOTS
// SoAoSoA
struct simdvertex
{
- simdvector attrib[SWR_VTX_NUM_SLOTS];
+ simdvector attrib[SWR_VTX_NUM_SLOTS];
};
+#if ENABLE_AVX512_SIMD16
+struct simd16vertex
+{
+ simd16vector attrib[SWR_VTX_NUM_SLOTS];
+};
+
+#endif
//////////////////////////////////////////////////////////////////////////
/// SWR_VS_CONTEXT
/// @brief Input to vertex shader