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authorRob Clark <[email protected]>2014-02-25 08:02:28 -0500
committerRob Clark <[email protected]>2014-03-02 11:26:35 -0500
commit76924e3b5178aef80804a8933e764661df6b37df (patch)
tree1672d3126320477a6835e9e386e4f4d07330a67a /src/gallium
parentbefbda56a246f77797bdf13fc005353441db2879 (diff)
freedreno/a3xx: fix for unused inputs
An unused input might not have a register assigned. We don't want bogus regid to result in impossibly high max_reg.. Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_program.c14
-rw-r--r--src/gallium/drivers/freedreno/a3xx/ir3_ra.c2
2 files changed, 11 insertions, 5 deletions
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_program.c b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
index 34d4dd3330b..9cc09889f98 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_program.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
@@ -80,10 +80,16 @@ static void
fixup_vp_regfootprint(struct fd3_shader_variant *so)
{
unsigned i;
- for (i = 0; i < so->inputs_count; i++)
- so->info.max_reg = MAX2(so->info.max_reg, (so->inputs[i].regid + 3) >> 2);
- for (i = 0; i < so->outputs_count; i++)
- so->info.max_reg = MAX2(so->info.max_reg, (so->outputs[i].regid + 3) >> 2);
+ for (i = 0; i < so->inputs_count; i++) {
+ if (so->inputs[i].compmask) {
+ uint32_t regid = (so->inputs[i].regid + 3) >> 2;
+ so->info.max_reg = MAX2(so->info.max_reg, regid);
+ }
+ }
+ for (i = 0; i < so->outputs_count; i++) {
+ uint32_t regid = (so->outputs[i].regid + 3) >> 2;
+ so->info.max_reg = MAX2(so->info.max_reg, regid);
+ }
}
static struct fd3_shader_variant *
diff --git a/src/gallium/drivers/freedreno/a3xx/ir3_ra.c b/src/gallium/drivers/freedreno/a3xx/ir3_ra.c
index 1b3d0e3e1e5..904727a7d70 100644
--- a/src/gallium/drivers/freedreno/a3xx/ir3_ra.c
+++ b/src/gallium/drivers/freedreno/a3xx/ir3_ra.c
@@ -565,7 +565,7 @@ static void legalize(struct ir3_ra_ctx *ctx, struct ir3_block *block)
struct ir3_instruction *end =
ir3_instr_create(block, 0, OPC_END);
struct ir3_instruction *last_input = NULL;
- regmask_t needs_ss_war;
+ regmask_t needs_ss_war; /* write after read */
regmask_t needs_ss;
regmask_t needs_sy;