diff options
| author | Anuj Phogat <[email protected]> | 2019-09-09 11:17:19 -0700 |
|---|---|---|
| committer | Anuj Phogat <[email protected]> | 2019-09-11 11:29:37 -0700 |
| commit | 729de1488f49033bc181b8123af5658228a51bf1 (patch) | |
| tree | 4772f68368c54368a605ebc59f4796570c7a27dd /src/gallium | |
| parent | ee2bde5232b0b703db5482b65b42bc6cbf29bb8f (diff) | |
intel/gen11+: Enable Hardware filtering of Semi-Pipelined State in WM
Initial benchmarking didn't show any performance benefits. But it might eventually.
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/iris/iris_state.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 1c70b2ccbff..4511a075ffc 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -824,6 +824,15 @@ iris_init_render_context(struct iris_screen *screen, iris_upload_slice_hashing_state(batch); #endif +#if GEN_GEN >= 11 + /* WA_220160979: Enable Hardware filtering of Semi-Pipelined State in WM */ + iris_pack_state(GENX(COMMON_SLICE_CHICKEN4), ®_val, reg) { + reg.EnableHardwareFilteringinWM = true; + reg.EnableHardwareFilteringinWMMask = true; + } + iris_emit_lri(batch, COMMON_SLICE_CHICKEN4, reg_val); +#endif + /* 3DSTATE_DRAWING_RECTANGLE is non-pipelined, so we want to avoid * changing it dynamically. We set it to the maximum size here, and * instead include the render target dimensions in the viewport, so |