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authorMarek Olšák <[email protected]>2017-10-08 23:47:30 +0200
committerMarek Olšák <[email protected]>2017-10-17 22:03:03 +0200
commit49f5ce39c10a289166df9d59c957e347925ca951 (patch)
treed9350aeeb2f86c03d04bccabaedbb303edf193a3 /src/gallium
parentcde209960c19ff866fa5a337541b68ef67198c48 (diff)
winsys/amdgpu: don't do read-modify-write on command buffers
i.e. don't use |= Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_cs.c19
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_cs.h1
2 files changed, 16 insertions, 4 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index d9d2a8b9230..0a657f7505d 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -725,6 +725,7 @@ static bool amdgpu_get_new_ib(struct radeon_winsys *ws, struct amdgpu_cs *cs,
/* ib_bytes is in dwords and the conversion to bytes will be done before
* the CS ioctl. */
ib->ptr_ib_size = &info->ib_bytes;
+ ib->ptr_ib_size_inside_ib = false;
amdgpu_cs_add_buffer(&cs->main.base, ib->big_ib_buffer,
RADEON_USAGE_READ, 0, RADEON_PRIO_IB1);
@@ -736,9 +737,19 @@ static bool amdgpu_get_new_ib(struct radeon_winsys *ws, struct amdgpu_cs *cs,
return true;
}
+static void amdgpu_set_ib_size(struct amdgpu_ib *ib)
+{
+ if (ib->ptr_ib_size_inside_ib) {
+ *ib->ptr_ib_size = ib->base.current.cdw |
+ S_3F2_CHAIN(1) | S_3F2_VALID(1);
+ } else {
+ *ib->ptr_ib_size = ib->base.current.cdw;
+ }
+}
+
static void amdgpu_ib_finalize(struct amdgpu_ib *ib)
{
- *ib->ptr_ib_size |= ib->base.current.cdw;
+ amdgpu_set_ib_size(ib);
ib->used_ib_space += ib->base.current.cdw * 4;
ib->max_ib_size = MAX2(ib->max_ib_size, ib->base.prev_dw + ib->base.current.cdw);
}
@@ -933,14 +944,14 @@ static bool amdgpu_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw)
: PKT3_INDIRECT_BUFFER_CONST, 2, 0));
radeon_emit(rcs, va);
radeon_emit(rcs, va >> 32);
- new_ptr_ib_size = &rcs->current.buf[rcs->current.cdw];
- radeon_emit(rcs, S_3F2_CHAIN(1) | S_3F2_VALID(1));
+ new_ptr_ib_size = &rcs->current.buf[rcs->current.cdw++];
assert((rcs->current.cdw & 7) == 0);
assert(rcs->current.cdw <= rcs->current.max_dw);
- *ib->ptr_ib_size |= rcs->current.cdw;
+ amdgpu_set_ib_size(ib);
ib->ptr_ib_size = new_ptr_ib_size;
+ ib->ptr_ib_size_inside_ib = true;
/* Hook up the new chunk */
rcs->prev[rcs->num_prev].buf = rcs->current.buf;
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
index 21e13547fc6..1c3d0f0be1c 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
@@ -73,6 +73,7 @@ struct amdgpu_ib {
unsigned used_ib_space;
unsigned max_ib_size;
uint32_t *ptr_ib_size;
+ bool ptr_ib_size_inside_ib;
enum ib_type ib_type;
};