diff options
| author | Pierre Moreau <[email protected]> | 2017-12-05 00:51:04 +0100 |
|---|---|---|
| committer | Karol Herbst <[email protected]> | 2018-09-13 20:49:38 +0200 |
| commit | 21b92b3464193a203e069f50c21ebec146ae0215 (patch) | |
| tree | 4ed2b33c6a944e0d0568d465ba2940add3459a2a /src/gallium | |
| parent | cb63e5d1eb0a73c2014a9dc798bfc7549f23279a (diff) | |
nvir: Always split 64-bit IMAD/IMUL operations
Those operations do not map to actual hardware instructions, therefore
those should always be lowered to 32-bit instructions.
Fixes: 009c54aa7af "nv50/ir: Split 64-bit integer MAD/MUL operations"
Signed-off-by: Pierre Moreau <[email protected]>
Reviewed-by: Karol Herbst <[email protected]>
Signed-off-by: Karol Herbst <[email protected]>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp index ecb4bae2a83..d851cf3c37c 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp @@ -3986,7 +3986,7 @@ Program::optimizeSSA(int level) RUN_PASS(2, AlgebraicOpt, run); RUN_PASS(2, ModifierFolding, run); // before load propagation -> less checks RUN_PASS(1, ConstantFolding, foldAll); - RUN_PASS(1, Split64BitOpPreRA, run); + RUN_PASS(0, Split64BitOpPreRA, run); RUN_PASS(2, LateAlgebraicOpt, run); RUN_PASS(1, LoadPropagation, run); RUN_PASS(1, IndirectPropagation, run); |