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authorKristian H. Kristensen <[email protected]>2018-09-20 21:09:04 -0700
committerRob Clark <[email protected]>2018-09-27 16:08:52 -0400
commit055905055707fce4b0b9cb2c2e8992f4e71cf938 (patch)
treeadb7278561bc24c859df37365e8a4dc1e8a35289 /src/gallium
parent1a40faa864f29bbde9b12abe31a062918a90e1a5 (diff)
freedreno/a6xx: Move inline functions out of fd6_draw.h
Only used in fd6_draw.c so put them there. Signed-off-by: Kristian H. Kristensen <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_draw.c107
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_draw.h108
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_gmem.c3
3 files changed, 110 insertions, 108 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
index 3b399953abe..b3ce712d0d7 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
@@ -40,6 +40,113 @@
#include "fd6_format.h"
#include "fd6_zsa.h"
+/* some bits in common w/ a4xx: */
+#include "a4xx/fd4_draw.h"
+
+static inline void
+fd6_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
+ enum pc_di_primtype primtype,
+ enum pc_di_vis_cull_mode vismode,
+ enum pc_di_src_sel src_sel, uint32_t count,
+ uint32_t instances, enum a4xx_index_size idx_type,
+ uint32_t idx_size, uint32_t idx_offset,
+ struct pipe_resource *idx_buffer)
+{
+ /* for debug after a lock up, write a unique counter value
+ * to scratch7 for each draw, to make it easier to match up
+ * register dumps to cmdstream. The combination of IB
+ * (scratch6) and DRAW is enough to "triangulate" the
+ * particular draw that caused lockup.
+ */
+ emit_marker6(ring, 7);
+
+ OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 7 : 3);
+ if (vismode == USE_VISIBILITY) {
+ /* leave vis mode blank for now, it will be patched up when
+ * we know if we are binning or not
+ */
+ OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0) | 0x2000,
+ &batch->draw_patches);
+ } else {
+ OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode) | 0x2000);
+ }
+ OUT_RING(ring, instances); /* NumInstances */
+ OUT_RING(ring, count); /* NumIndices */
+ if (idx_buffer) {
+ OUT_RING(ring, 0x0); /* XXX */
+ OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
+ OUT_RING (ring, idx_size);
+ }
+
+ emit_marker6(ring, 7);
+
+ fd_reset_wfi(batch);
+}
+
+static inline void
+fd6_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
+ enum pc_di_primtype primtype,
+ enum pc_di_vis_cull_mode vismode,
+ const struct pipe_draw_info *info,
+ unsigned index_offset)
+{
+ struct pipe_resource *idx_buffer = NULL;
+ enum a4xx_index_size idx_type;
+ enum pc_di_src_sel src_sel;
+ uint32_t idx_size, idx_offset;
+
+ if (info->indirect) {
+ struct fd_resource *ind = fd_resource(info->indirect->buffer);
+
+ emit_marker6(ring, 7);
+
+ if (info->index_size) {
+ struct pipe_resource *idx = info->index.resource;
+ unsigned max_indicies = (idx->width0 - info->indirect->offset) /
+ info->index_size;
+
+ OUT_PKT7(ring, CP_DRAW_INDX_INDIRECT, 6);
+ OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_DMA,
+ fd4_size2indextype(info->index_size), 0),
+ &batch->draw_patches);
+ OUT_RELOC(ring, fd_resource(idx)->bo,
+ index_offset, 0, 0);
+ // XXX: Check A5xx vs A6xx
+ OUT_RING(ring, A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(max_indicies));
+ OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
+ } else {
+ OUT_PKT7(ring, CP_DRAW_INDIRECT, 3);
+ OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_AUTO_INDEX, 0, 0),
+ &batch->draw_patches);
+ OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
+ }
+
+ emit_marker6(ring, 7);
+ fd_reset_wfi(batch);
+
+ return;
+ }
+
+ if (info->index_size) {
+ assert(!info->has_user_indices);
+
+ idx_buffer = info->index.resource;
+ idx_type = fd4_size2indextype(info->index_size);
+ idx_size = info->index_size * info->count;
+ idx_offset = index_offset + info->start * info->index_size;
+ src_sel = DI_SRC_SEL_DMA;
+ } else {
+ idx_buffer = NULL;
+ idx_type = INDEX4_SIZE_32_BIT;
+ idx_size = 0;
+ idx_offset = 0;
+ src_sel = DI_SRC_SEL_AUTO_INDEX;
+ }
+
+ fd6_draw(batch, ring, primtype, vismode, src_sel,
+ info->count, info->instance_count,
+ idx_type, idx_size, idx_offset, idx_buffer);
+}
static void
draw_impl(struct fd_context *ctx, struct fd_ringbuffer *ring,
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.h b/src/gallium/drivers/freedreno/a6xx/fd6_draw.h
index 8f3c058cf5c..cf33088b4b8 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.h
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.h
@@ -34,114 +34,6 @@
#include "fd6_context.h"
-/* some bits in common w/ a4xx: */
-#include "a4xx/fd4_draw.h"
-
void fd6_draw_init(struct pipe_context *pctx);
-static inline void
-fd6_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
- enum pc_di_primtype primtype,
- enum pc_di_vis_cull_mode vismode,
- enum pc_di_src_sel src_sel, uint32_t count,
- uint32_t instances, enum a4xx_index_size idx_type,
- uint32_t idx_size, uint32_t idx_offset,
- struct pipe_resource *idx_buffer)
-{
- /* for debug after a lock up, write a unique counter value
- * to scratch7 for each draw, to make it easier to match up
- * register dumps to cmdstream. The combination of IB
- * (scratch6) and DRAW is enough to "triangulate" the
- * particular draw that caused lockup.
- */
- emit_marker6(ring, 7);
-
- OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 7 : 3);
- if (vismode == USE_VISIBILITY) {
- /* leave vis mode blank for now, it will be patched up when
- * we know if we are binning or not
- */
- OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0) | 0x2000,
- &batch->draw_patches);
- } else {
- OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode) | 0x2000);
- }
- OUT_RING(ring, instances); /* NumInstances */
- OUT_RING(ring, count); /* NumIndices */
- if (idx_buffer) {
- OUT_RING(ring, 0x0); /* XXX */
- OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
- OUT_RING (ring, idx_size);
- }
-
- emit_marker6(ring, 7);
-
- fd_reset_wfi(batch);
-}
-
-static inline void
-fd6_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
- enum pc_di_primtype primtype,
- enum pc_di_vis_cull_mode vismode,
- const struct pipe_draw_info *info,
- unsigned index_offset)
-{
- struct pipe_resource *idx_buffer = NULL;
- enum a4xx_index_size idx_type;
- enum pc_di_src_sel src_sel;
- uint32_t idx_size, idx_offset;
-
- if (info->indirect) {
- struct fd_resource *ind = fd_resource(info->indirect->buffer);
-
- emit_marker6(ring, 7);
-
- if (info->index_size) {
- struct pipe_resource *idx = info->index.resource;
- unsigned max_indicies = (idx->width0 - info->indirect->offset) /
- info->index_size;
-
- OUT_PKT7(ring, CP_DRAW_INDX_INDIRECT, 6);
- OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_DMA,
- fd4_size2indextype(info->index_size), 0),
- &batch->draw_patches);
- OUT_RELOC(ring, fd_resource(idx)->bo,
- index_offset, 0, 0);
- // XXX: Check A5xx vs A6xx
- OUT_RING(ring, A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(max_indicies));
- OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
- } else {
- OUT_PKT7(ring, CP_DRAW_INDIRECT, 3);
- OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_AUTO_INDEX, 0, 0),
- &batch->draw_patches);
- OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
- }
-
- emit_marker6(ring, 7);
- fd_reset_wfi(batch);
-
- return;
- }
-
- if (info->index_size) {
- assert(!info->has_user_indices);
-
- idx_buffer = info->index.resource;
- idx_type = fd4_size2indextype(info->index_size);
- idx_size = info->index_size * info->count;
- idx_offset = index_offset + info->start * info->index_size;
- src_sel = DI_SRC_SEL_DMA;
- } else {
- idx_buffer = NULL;
- idx_type = INDEX4_SIZE_32_BIT;
- idx_size = 0;
- idx_offset = 0;
- src_sel = DI_SRC_SEL_AUTO_INDEX;
- }
-
- fd6_draw(batch, ring, primtype, vismode, src_sel,
- info->count, info->instance_count,
- idx_type, idx_size, idx_offset, idx_buffer);
-}
-
#endif /* FD6_DRAW_H_ */
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
index 86671fb75da..4c40d374d02 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
@@ -45,6 +45,9 @@
#include "fd6_format.h"
#include "fd6_zsa.h"
+/* some bits in common w/ a4xx: */
+#include "a4xx/fd4_draw.h"
+
static void
emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
struct pipe_surface **bufs, struct fd_gmem_stateobj *gmem)