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authorsonjiang <[email protected]>2016-06-29 11:24:36 -0400
committerLeo Liu <[email protected]>2016-06-29 15:30:14 -0400
commit28f85eab49b28905e99a24fcb7f155063e5482e4 (patch)
tree70fb2904bbf985925ac38592dd0c251616905a11 /src/gallium
parentfa10d1d67472cd2e821c5aa196590d43896a78fb (diff)
radeon uvd add uvd fw version for amdgpu
Signed-off-by: sonjiang <[email protected]> Cc: "12.0" <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/radeon/radeon_winsys.h1
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c11
2 files changed, 11 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index afb970e7c58..f32edf09a2d 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -258,6 +258,7 @@ struct radeon_info {
bool gfx_ib_pad_with_type2;
bool has_sdma;
bool has_uvd;
+ uint32_t uvd_fw_version;
uint32_t vce_fw_version;
uint32_t vce_harvest_config;
uint32_t clock_crystal_freq;
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index 72afc764e14..b8fb4dde894 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
@@ -98,7 +98,7 @@ static bool do_winsys_init(struct amdgpu_winsys *ws, int fd)
struct amdgpu_buffer_size_alignments alignment_info = {};
struct amdgpu_heap_info vram, gtt;
struct drm_amdgpu_info_hw_ip dma = {}, uvd = {}, vce = {};
- uint32_t vce_version = 0, vce_feature = 0;
+ uint32_t vce_version = 0, vce_feature = 0, uvd_version = 0, uvd_feature = 0;
int r, i, j;
drmDevicePtr devinfo;
@@ -151,6 +151,13 @@ static bool do_winsys_init(struct amdgpu_winsys *ws, int fd)
goto fail;
}
+ r = amdgpu_query_firmware_version(ws->dev, AMDGPU_INFO_FW_UVD, 0, 0,
+ &uvd_version, &uvd_feature);
+ if (r) {
+ fprintf(stderr, "amdgpu: amdgpu_query_firmware_version(uvd) failed.\n");
+ goto fail;
+ }
+
r = amdgpu_query_hw_ip_info(ws->dev, AMDGPU_HW_IP_VCE, 0, &vce);
if (r) {
fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(vce) failed.\n");
@@ -268,6 +275,8 @@ static bool do_winsys_init(struct amdgpu_winsys *ws, int fd)
ws->info.max_se = ws->amdinfo.num_shader_engines;
ws->info.max_sh_per_se = ws->amdinfo.num_shader_arrays_per_engine;
ws->info.has_uvd = uvd.available_rings != 0;
+ ws->info.uvd_fw_version =
+ uvd.available_rings ? uvd_version : 0;
ws->info.vce_fw_version =
vce.available_rings ? vce_version : 0;
ws->info.has_userptr = true;