diff options
author | Eric Engestrom <[email protected]> | 2016-07-30 01:33:56 +0100 |
---|---|---|
committer | Rob Clark <[email protected]> | 2016-07-30 09:23:42 -0400 |
commit | a63bac9271cf4984b4b8c0158e99fffa7f78c8bb (patch) | |
tree | 784931e643ef950e0836783f9950c10241fe022e /src/gallium | |
parent | 3563c4d16138360fd8756576e0c9c825ed6cec86 (diff) |
gallium/freedreno: move cast to avoid integer overflow
Previously, the bitshift would be performed on a simple int (32 bits on
most systems), overflow, and then be cast to 64 bits.
CovID: 1362461
Signed-off-by: Eric Engestrom <[email protected]>
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r-- | src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c index 6829544d354..39418fca41f 100644 --- a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c +++ b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c @@ -402,10 +402,10 @@ add_src_reg(struct fd2_compile_context *ctx, struct ir2_instruction *alu, swiz[3] = swiz_vals[src->SwizzleW]; swiz[4] = '\0'; - if ((ctx->need_sync & (uint64_t)(1 << num)) && + if ((ctx->need_sync & ((uint64_t)1 << num)) && !(flags & IR2_REG_CONST)) { alu->sync = true; - ctx->need_sync &= ~(uint64_t)(1 << num); + ctx->need_sync &= ~((uint64_t)1 << num); } return ir2_reg_create(alu, num, swiz, flags); |