diff options
| author | Brian Paul <[email protected]> | 2010-06-03 09:01:25 -0600 |
|---|---|---|
| committer | Brian Paul <[email protected]> | 2010-06-03 09:01:32 -0600 |
| commit | b297b14d30ef98582f3511b46c161bc62115684d (patch) | |
| tree | 36a381a40d0ba936d811fbd04f7f96014e6e125e /src/gallium | |
| parent | d4afee9202ae0c972fd78cb82ae0c1b48d562673 (diff) | |
tgsi: we don't support indirect input/output registers in SSE codegen yet
Extend the check for indirect addressing of temp regs to include
input/output regs.
Fixes failure with piglit glsl-texcoord-array.shader_test test when using
SSE codegen.
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_sse2.c | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_sse2.c b/src/gallium/auxiliary/tgsi/tgsi_sse2.c index 6f9049a61ef..785a9fb0356 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_sse2.c +++ b/src/gallium/auxiliary/tgsi/tgsi_sse2.c @@ -1705,22 +1705,26 @@ emit_cmp( /** - * Check if inst src/dest regs use indirect addressing into temporary - * register file. + * Check if inst src/dest regs use indirect addressing into temporary, + * input or output register files. */ static boolean -indirect_temp_reference(const struct tgsi_full_instruction *inst) +indirect_reg_reference(const struct tgsi_full_instruction *inst) { uint i; for (i = 0; i < inst->Instruction.NumSrcRegs; i++) { const struct tgsi_full_src_register *reg = &inst->Src[i]; - if (reg->Register.File == TGSI_FILE_TEMPORARY && + if ((reg->Register.File == TGSI_FILE_TEMPORARY || + reg->Register.File == TGSI_FILE_INPUT || + reg->Register.File == TGSI_FILE_OUTPUT) && reg->Register.Indirect) return TRUE; } for (i = 0; i < inst->Instruction.NumDstRegs; i++) { const struct tgsi_full_dst_register *reg = &inst->Dst[i]; - if (reg->Register.File == TGSI_FILE_TEMPORARY && + if ((reg->Register.File == TGSI_FILE_TEMPORARY || + reg->Register.File == TGSI_FILE_INPUT || + reg->Register.File == TGSI_FILE_OUTPUT) && reg->Register.Indirect) return TRUE; } @@ -1736,7 +1740,7 @@ emit_instruction( unsigned chan_index; /* we can't handle indirect addressing into temp register file yet */ - if (indirect_temp_reference(inst)) + if (indirect_reg_reference(inst)) return FALSE; switch (inst->Instruction.Opcode) { |