diff options
author | Dave Airlie <[email protected]> | 2010-10-01 15:56:05 +1000 |
---|---|---|
committer | Dave Airlie <[email protected]> | 2010-10-01 16:06:31 +1000 |
commit | 738aa29289296512959cbb37d8602131dae44dab (patch) | |
tree | e1609f2025cb1ae36d461a20f93dda5db612aa15 /src/gallium/winsys | |
parent | 7777c997e0f4cf75ff292f34a5a64ee2834c0f26 (diff) |
r600g: setup basic loop consts on r600 + evergreen.
this sets up a single loop constant like r600c does.
Diffstat (limited to 'src/gallium/winsys')
-rw-r--r-- | src/gallium/winsys/r600/drm/evergreen_hw_context.c | 21 | ||||
-rw-r--r-- | src/gallium/winsys/r600/drm/r600_hw_context.c | 21 |
2 files changed, 42 insertions, 0 deletions
diff --git a/src/gallium/winsys/r600/drm/evergreen_hw_context.c b/src/gallium/winsys/r600/drm/evergreen_hw_context.c index 129f571a04f..c3569e60e88 100644 --- a/src/gallium/winsys/r600/drm/evergreen_hw_context.c +++ b/src/gallium/winsys/r600/drm/evergreen_hw_context.c @@ -493,6 +493,22 @@ static int evergreen_state_sampler_border_init(struct r600_context *ctx, u32 off return 0; } +static int evergreen_loop_const_init(struct r600_context *ctx, u32 offset) +{ + unsigned nreg = 32; + struct r600_reg r600_loop_consts[32]; + int i; + + for (i = 0; i < nreg; i++) { + r600_loop_consts[i].opcode = PKT3_SET_LOOP_CONST; + r600_loop_consts[i].offset_base = EVERGREEN_LOOP_CONST_OFFSET; + r600_loop_consts[i].offset = EVERGREEN_LOOP_CONST_OFFSET + ((offset + i) * 4); + r600_loop_consts[i].need_bo = 0; + r600_loop_consts[i].flush_flags = 0; + } + return r600_context_add_block(ctx, r600_loop_consts, nreg); +} + int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon) { int r; @@ -566,6 +582,11 @@ int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon) goto out_err; } + /* PS loop const */ + evergreen_loop_const_init(ctx, 0); + /* VS loop const */ + evergreen_loop_const_init(ctx, 32); + /* setup block table */ ctx->blocks = calloc(ctx->nblocks, sizeof(void*)); for (int i = 0, c = 0; i < 256; i++) { diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c index 4d7547c9758..2ca5a45e03d 100644 --- a/src/gallium/winsys/r600/drm/r600_hw_context.c +++ b/src/gallium/winsys/r600/drm/r600_hw_context.c @@ -542,6 +542,22 @@ static int r600_state_sampler_border_init(struct r600_context *ctx, u32 offset) return r600_context_add_block(ctx, r600_shader_sampler_border, nreg); } +static int r600_loop_const_init(struct r600_context *ctx, u32 offset) +{ + unsigned nreg = 32; + struct r600_reg r600_loop_consts[32]; + int i; + + for (i = 0; i < nreg; i++) { + r600_loop_consts[i].opcode = PKT3_SET_LOOP_CONST; + r600_loop_consts[i].offset_base = R600_LOOP_CONST_OFFSET; + r600_loop_consts[i].offset = R600_LOOP_CONST_OFFSET + ((offset + i) * 4); + r600_loop_consts[i].need_bo = 0; + r600_loop_consts[i].flush_flags = 0; + } + return r600_context_add_block(ctx, r600_loop_consts, nreg); +} + /* initialize */ void r600_context_fini(struct r600_context *ctx) { @@ -639,6 +655,11 @@ int r600_context_init(struct r600_context *ctx, struct radeon *radeon) goto out_err; } + /* PS loop const */ + r600_loop_const_init(ctx, 0); + /* VS loop const */ + r600_loop_const_init(ctx, 32); + /* setup block table */ ctx->blocks = calloc(ctx->nblocks, sizeof(void*)); for (int i = 0, c = 0; i < 256; i++) { |