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authorDave Airlie <[email protected]>2010-09-08 08:41:57 +1000
committerDave Airlie <[email protected]>2010-09-08 08:41:57 +1000
commitd42efb9e8df6ef872ab4f142e3daf1b6cb9eff11 (patch)
treebd6cd1754fdddb6a730ad4fe61478187419df78e /src/gallium/winsys
parent9ef1c51be16ea360481cf9f82ebb1e3eb01efb18 (diff)
r600g: add support for constants in memory buffers.
DX9 constants were in the constant file, and evergreen no longer support cfile. r600/700 can also use constants in memory buffers, so add the code (disabled for now) to enable that as precursor for evergreen.
Diffstat (limited to 'src/gallium/winsys')
-rw-r--r--src/gallium/winsys/r600/drm/r600_state.c1
-rw-r--r--src/gallium/winsys/r600/drm/r600_states.h10
2 files changed, 11 insertions, 0 deletions
diff --git a/src/gallium/winsys/r600/drm/r600_state.c b/src/gallium/winsys/r600/drm/r600_state.c
index 71d65f0feab..23eed81e04d 100644
--- a/src/gallium/winsys/r600/drm/r600_state.c
+++ b/src/gallium/winsys/r600/drm/r600_state.c
@@ -65,6 +65,7 @@ struct radeon_stype_info r600_stypes[] = {
{ R600_STATE_BLEND, 1, 0, r600_state_pm4_generic, SUB_NONE(BLEND), },
{ R600_STATE_DSA, 1, 0, r600_state_pm4_generic, SUB_NONE(DSA), },
{ R600_STATE_SHADER, 1, 0, r600_state_pm4_shader, { SUB_PS(PS_SHADER), SUB_VS(VS_SHADER) } },
+ { R600_STATE_CBUF, 1, 0, r600_state_pm4_shader, { SUB_PS(PS_CBUF), SUB_VS(VS_CBUF) } },
{ R600_STATE_CONSTANT, 256, 0x10, r600_state_pm4_generic, { SUB_PS(PS_CONSTANT), SUB_VS(VS_CONSTANT) } },
{ R600_STATE_RESOURCE, 160, 0x1c, r600_state_pm4_resource, { SUB_PS(PS_RESOURCE), SUB_VS(VS_RESOURCE), SUB_GS(GS_RESOURCE), SUB_FS(FS_RESOURCE)} },
{ R600_STATE_SAMPLER, 18, 0xc, r600_state_pm4_generic, { SUB_PS(PS_SAMPLER), SUB_VS(VS_SAMPLER), SUB_GS(GS_SAMPLER) } },
diff --git a/src/gallium/winsys/r600/drm/r600_states.h b/src/gallium/winsys/r600/drm/r600_states.h
index 09d79d498d8..06f6c7773d2 100644
--- a/src/gallium/winsys/r600/drm/r600_states.h
+++ b/src/gallium/winsys/r600/drm/r600_states.h
@@ -269,6 +269,16 @@ static const struct radeon_register R600_names_PS_SHADER[] = {
{0x000288CC, 0, 0, "SQ_PGM_CF_OFFSET_PS"},
};
+static const struct radeon_register R600_names_VS_CBUF[] = {
+ {0x00028180, 0, 0, "ALU_CONST_BUFFER_SIZE_VS_0"},
+ {0x00028980, 1, 0, "ALU_CONST_CACHE_VS_0"},
+};
+
+static const struct radeon_register R600_names_PS_CBUF[] = {
+ {0x00028140, 0, 0, "ALU_CONST_BUFFER_SIZE_PS_0"},
+ {0x00028940, 1, 0, "ALU_CONST_CACHE_PS_0"},
+};
+
static const struct radeon_register R600_names_PS_CONSTANT[] = {
{0x00030000, 0, 0, "SQ_ALU_CONSTANT0_0"},
{0x00030004, 0, 0, "SQ_ALU_CONSTANT1_0"},