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authorMarek Olšák <[email protected]>2016-02-24 01:13:22 +0100
committerMarek Olšák <[email protected]>2016-03-09 15:02:26 +0100
commitbd1feb28273e8d7047304e5a2a02ca3d71de5533 (patch)
tree239edaef5de58be8d7210478f1269ffd16e2607e /src/gallium/winsys
parent6011d7cf2528a02f1737b25bc180c2076a076173 (diff)
gallium/radeon: rename winsys buffer_get/set_tiling to buffer_get/set_metadata
Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/winsys')
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_bo.c12
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_bo.c12
2 files changed, 12 insertions, 12 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
index 6a79e388311..10ac2b25c6b 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
@@ -390,8 +390,8 @@ static unsigned eg_tile_split_rev(unsigned eg_tile_split)
}
}
-static void amdgpu_bo_get_tiling(struct pb_buffer *_buf,
- struct radeon_bo_metadata *md)
+static void amdgpu_buffer_get_metadata(struct pb_buffer *_buf,
+ struct radeon_bo_metadata *md)
{
struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(_buf);
struct amdgpu_bo_info info = {0};
@@ -419,8 +419,8 @@ static void amdgpu_bo_get_tiling(struct pb_buffer *_buf,
md->scanout = AMDGPU_TILING_GET(tiling_flags, MICRO_TILE_MODE) == 0; /* DISPLAY */
}
-static void amdgpu_bo_set_tiling(struct pb_buffer *_buf,
- struct radeon_bo_metadata *md)
+static void amdgpu_buffer_set_metadata(struct pb_buffer *_buf,
+ struct radeon_bo_metadata *md)
{
struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(_buf);
struct amdgpu_bo_metadata metadata = {0};
@@ -702,8 +702,8 @@ static uint64_t amdgpu_bo_get_va(struct pb_buffer *buf)
void amdgpu_bo_init_functions(struct amdgpu_winsys *ws)
{
- ws->base.buffer_set_tiling = amdgpu_bo_set_tiling;
- ws->base.buffer_get_tiling = amdgpu_bo_get_tiling;
+ ws->base.buffer_set_metadata = amdgpu_buffer_set_metadata;
+ ws->base.buffer_get_metadata = amdgpu_buffer_get_metadata;
ws->base.buffer_map = amdgpu_bo_map;
ws->base.buffer_unmap = amdgpu_bo_unmap;
ws->base.buffer_wait = amdgpu_bo_wait;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index cd769f7ade9..978df52447e 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -636,8 +636,8 @@ static unsigned eg_tile_split_rev(unsigned eg_tile_split)
}
}
-static void radeon_bo_get_tiling(struct pb_buffer *_buf,
- struct radeon_bo_metadata *md)
+static void radeon_bo_get_metadata(struct pb_buffer *_buf,
+ struct radeon_bo_metadata *md)
{
struct radeon_bo *bo = radeon_bo(_buf);
struct drm_radeon_gem_set_tiling args;
@@ -670,8 +670,8 @@ static void radeon_bo_get_tiling(struct pb_buffer *_buf,
md->scanout = bo->rws->gen >= DRV_SI && !(args.tiling_flags & RADEON_TILING_R600_NO_SCANOUT);
}
-static void radeon_bo_set_tiling(struct pb_buffer *_buf,
- struct radeon_bo_metadata *md)
+static void radeon_bo_set_metadata(struct pb_buffer *_buf,
+ struct radeon_bo_metadata *md)
{
struct radeon_bo *bo = radeon_bo(_buf);
struct drm_radeon_gem_set_tiling args;
@@ -1040,8 +1040,8 @@ static uint64_t radeon_winsys_bo_va(struct pb_buffer *buf)
void radeon_drm_bo_init_functions(struct radeon_drm_winsys *ws)
{
- ws->base.buffer_set_tiling = radeon_bo_set_tiling;
- ws->base.buffer_get_tiling = radeon_bo_get_tiling;
+ ws->base.buffer_set_metadata = radeon_bo_set_metadata;
+ ws->base.buffer_get_metadata = radeon_bo_get_metadata;
ws->base.buffer_map = radeon_bo_map;
ws->base.buffer_unmap = radeon_bo_unmap;
ws->base.buffer_wait = radeon_bo_wait;