diff options
| author | Dave Airlie <[email protected]> | 2010-09-21 19:57:58 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2010-09-21 20:53:09 +1000 |
| commit | 88934273776242878dbaabdae25a7027fdeaff05 (patch) | |
| tree | d97fad1c466460c098f7d2c46eac535b18e2db61 /src/gallium/winsys | |
| parent | b6ced8ee7b2c86e94fd7467d12aca5e322048ba4 (diff) | |
r600g: fix eg texture borders.
texture border regs are indexed on evergreen.
Diffstat (limited to 'src/gallium/winsys')
| -rw-r--r-- | src/gallium/winsys/r600/drm/eg_states.h | 27 | ||||
| -rw-r--r-- | src/gallium/winsys/r600/drm/r600_state.c | 2 |
2 files changed, 16 insertions, 13 deletions
diff --git a/src/gallium/winsys/r600/drm/eg_states.h b/src/gallium/winsys/r600/drm/eg_states.h index c26ba6c6cd0..518e05fefbb 100644 --- a/src/gallium/winsys/r600/drm/eg_states.h +++ b/src/gallium/winsys/r600/drm/eg_states.h @@ -371,24 +371,27 @@ static const struct radeon_register EG_names_GS_SAMPLER[] = { }; static const struct radeon_register EG_names_PS_SAMPLER_BORDER[] = { - {0x0000A400, 0, 0, "TD_PS_SAMPLER0_BORDER_RED"}, - {0x0000A404, 0, 0, "TD_PS_SAMPLER0_BORDER_GREEN"}, - {0x0000A408, 0, 0, "TD_PS_SAMPLER0_BORDER_BLUE"}, - {0x0000A40C, 0, 0, "TD_PS_SAMPLER0_BORDER_ALPHA"}, + {0x0000A400, 0, 0, "TD_PS_SAMPLER0_BORDER_INDEX"}, + {0x0000A404, 0, 0, "TD_PS_SAMPLER0_BORDER_RED"}, + {0x0000A408, 0, 0, "TD_PS_SAMPLER0_BORDER_GREEN"}, + {0x0000A40C, 0, 0, "TD_PS_SAMPLER0_BORDER_BLUE"}, + {0x0000A410, 0, 0, "TD_PS_SAMPLER0_BORDER_ALPHA"}, }; static const struct radeon_register EG_names_VS_SAMPLER_BORDER[] = { - {0x0000A600, 0, 0, "TD_VS_SAMPLER0_BORDER_RED"}, - {0x0000A604, 0, 0, "TD_VS_SAMPLER0_BORDER_GREEN"}, - {0x0000A608, 0, 0, "TD_VS_SAMPLER0_BORDER_BLUE"}, - {0x0000A60C, 0, 0, "TD_VS_SAMPLER0_BORDER_ALPHA"}, + {0x0000A414, 0, 0, "TD_VS_SAMPLER0_BORDER_INDEX"}, + {0x0000A418, 0, 0, "TD_VS_SAMPLER0_BORDER_RED"}, + {0x0000A41C, 0, 0, "TD_VS_SAMPLER0_BORDER_GREEN"}, + {0x0000A420, 0, 0, "TD_VS_SAMPLER0_BORDER_BLUE"}, + {0x0000A424, 0, 0, "TD_VS_SAMPLER0_BORDER_ALPHA"}, }; static const struct radeon_register EG_names_GS_SAMPLER_BORDER[] = { - {0x0000A800, 0, 0, "TD_GS_SAMPLER0_BORDER_RED"}, - {0x0000A804, 0, 0, "TD_GS_SAMPLER0_BORDER_GREEN"}, - {0x0000A808, 0, 0, "TD_GS_SAMPLER0_BORDER_BLUE"}, - {0x0000A80C, 0, 0, "TD_GS_SAMPLER0_BORDER_ALPHA"}, + {0x0000A428, 0, 0, "TD_GS_SAMPLER0_BORDER_INDEX"}, + {0x0000A42C, 0, 0, "TD_GS_SAMPLER0_BORDER_RED"}, + {0x0000A430, 0, 0, "TD_GS_SAMPLER0_BORDER_GREEN"}, + {0x0000A434, 0, 0, "TD_GS_SAMPLER0_BORDER_BLUE"}, + {0x0000A438, 0, 0, "TD_GS_SAMPLER0_BORDER_ALPHA"}, }; static const struct radeon_register EG_names_CB[] = { diff --git a/src/gallium/winsys/r600/drm/r600_state.c b/src/gallium/winsys/r600/drm/r600_state.c index a4739021c4c..25dd8fe7d81 100644 --- a/src/gallium/winsys/r600/drm/r600_state.c +++ b/src/gallium/winsys/r600/drm/r600_state.c @@ -110,7 +110,7 @@ struct radeon_stype_info eg_stypes[] = { { R600_STATE_CBUF, 1, 0, r600_state_pm4_shader, { EG_SUB_PS(PS_CBUF), EG_SUB_VS(VS_CBUF) } }, { R600_STATE_RESOURCE, 176, 0x20, r600_state_pm4_resource, { EG_SUB_PS(PS_RESOURCE), EG_SUB_VS(VS_RESOURCE), EG_SUB_GS(GS_RESOURCE), EG_SUB_FS(FS_RESOURCE)} }, { R600_STATE_SAMPLER, 18, 0xc, r600_state_pm4_generic, { EG_SUB_PS(PS_SAMPLER), EG_SUB_VS(VS_SAMPLER), EG_SUB_GS(GS_SAMPLER) } }, - { R600_STATE_SAMPLER_BORDER, 18, 0x10, r600_state_pm4_generic, { EG_SUB_PS(PS_SAMPLER_BORDER), EG_SUB_VS(VS_SAMPLER_BORDER), EG_SUB_GS(GS_SAMPLER_BORDER) } }, + { R600_STATE_SAMPLER_BORDER, 18, 0, r600_state_pm4_generic, { EG_SUB_PS(PS_SAMPLER_BORDER), EG_SUB_VS(VS_SAMPLER_BORDER), EG_SUB_GS(GS_SAMPLER_BORDER) } }, { R600_STATE_CB0, 11, 0x3c, r600_state_pm4_generic, EG_SUB_NONE(CB) }, { R600_STATE_QUERY_BEGIN, 1, 0, r600_state_pm4_query_begin, EG_SUB_NONE(VGT_EVENT) }, { R600_STATE_QUERY_END, 1, 0, r600_state_pm4_query_end, EG_SUB_NONE(VGT_EVENT) }, |