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authorAlex Deucher <[email protected]>2010-11-17 21:30:09 -0500
committerAlex Deucher <[email protected]>2010-11-17 21:33:40 -0500
commita23f25eba1fb8919a29efb88ef9e351abcc65b2e (patch)
tree943c18b06002f1f759983ebc14f865ad61c047f1 /src/gallium/winsys
parentda35388044db4aa6fc66c08a087d8d703b5a6008 (diff)
r600g: fix buffer alignment
This should fix the remaining buffer alignment issues in r600g.
Diffstat (limited to 'src/gallium/winsys')
-rw-r--r--src/gallium/winsys/r600/drm/r600_drm.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/gallium/winsys/r600/drm/r600_drm.c b/src/gallium/winsys/r600/drm/r600_drm.c
index 60c2f51fac0..6742993ef3e 100644
--- a/src/gallium/winsys/r600/drm/r600_drm.c
+++ b/src/gallium/winsys/r600/drm/r600_drm.c
@@ -195,12 +195,16 @@ struct radeon *radeon_new(int fd, unsigned device)
case CHIP_RS780:
case CHIP_RS880:
radeon->chip_class = R600;
+ /* set default group bytes, overridden by tiling info ioctl */
+ radeon->tiling_info.group_bytes = 256;
break;
case CHIP_RV770:
case CHIP_RV730:
case CHIP_RV710:
case CHIP_RV740:
radeon->chip_class = R700;
+ /* set default group bytes, overridden by tiling info ioctl */
+ radeon->tiling_info.group_bytes = 256;
break;
case CHIP_CEDAR:
case CHIP_REDWOOD:
@@ -208,6 +212,8 @@ struct radeon *radeon_new(int fd, unsigned device)
case CHIP_CYPRESS:
case CHIP_HEMLOCK:
radeon->chip_class = EVERGREEN;
+ /* set default group bytes, overridden by tiling info ioctl */
+ radeon->tiling_info.group_bytes = 512;
break;
default:
fprintf(stderr, "%s unknown or unsupported chipset 0x%04X\n",