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authorTom Stellard <[email protected]>2014-04-18 16:28:40 +0200
committerTom Stellard <[email protected]>2014-04-29 15:25:50 -0700
commit0a41054b7faa9df4e4b8802f646a7e078389eb89 (patch)
treee5a382ee779972b3a1f327f000c400b0569de400 /src/gallium/winsys
parent5fe1a0ebadea1dbcdbd1b7a92969a283dcbb3362 (diff)
radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
Igor Gnatenko: v2: in define RADEON_INFO_MAX_SCLK use 0x1a instead of 0x19 (upstream changes) Bruno JimĂ©nez: v3: Convert the frequency to MHz from kHz after getting it in 'do_winsys_init' Signed-off-by: Igor Gnatenko <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
Diffstat (limited to 'src/gallium/winsys')
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_winsys.c5
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_winsys.h1
2 files changed, 6 insertions, 0 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index b53bebae993..76183160ddc 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -317,6 +317,11 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
ws->info.gart_size = gem_info.gart_size;
ws->info.vram_size = gem_info.vram_size;
+ /* Get max clock frequency info and convert it to MHz */
+ radeon_get_drm_value(ws->fd, RADEON_INFO_MAX_SCLK, NULL,
+ &ws->info.max_sclk);
+ ws->info.max_sclk /= 1000;
+
ws->num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
/* Generation-specific queries. */
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index fe0617b682b..1cb17bb9e01 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -196,6 +196,7 @@ struct radeon_info {
enum chip_class chip_class;
uint32_t gart_size;
uint32_t vram_size;
+ uint32_t max_sclk;
uint32_t drm_major; /* version */
uint32_t drm_minor;