diff options
| author | Marek Olšák <[email protected]> | 2012-12-21 17:15:56 +0100 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2013-01-04 13:18:50 +0100 |
| commit | 12aeb47b6af4b3100da26b3ab72ef93886479219 (patch) | |
| tree | 68146772416068fdb68eb26af4db63306e198dc2 /src/gallium/winsys | |
| parent | 598cc1f74d7ae924e84dee801b456ab7b0b22f84 (diff) | |
gallium/radeon: send the END_OF_FRAME flag to the DRM
Diffstat (limited to 'src/gallium/winsys')
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 10 | ||||
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_winsys.h | 1 |
2 files changed, 9 insertions, 2 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c index f9be96186e6..c5e7f1e44c2 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c @@ -81,8 +81,6 @@ /* The first dword of RADEON_CHUNK_ID_FLAGS is a uint32 of these flags: */ #define RADEON_CS_KEEP_TILING_FLAGS 0x01 - - #endif #ifndef RADEON_CS_USE_VM @@ -92,6 +90,10 @@ #define RADEON_CS_RING_COMPUTE 1 #endif +#ifndef RADEON_CS_END_OF_FRAME +#define RADEON_CS_END_OF_FRAME 0x04 +#endif + #define RELOC_DWORDS (sizeof(struct drm_radeon_cs_reloc) / sizeof(uint32_t)) @@ -473,6 +475,10 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags) cs->cst->flags[0] |= RADEON_CS_USE_VM; cs->cst->cs.num_chunks = 3; } + if (flags & RADEON_FLUSH_END_OF_FRAME) { + cs->cst->flags[0] |= RADEON_CS_END_OF_FRAME; + cs->cst->cs.num_chunks = 3; + } if (flags & RADEON_FLUSH_COMPUTE) { cs->cst->flags[1] = RADEON_CS_RING_COMPUTE; cs->cst->cs.num_chunks = 3; diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h index b7eac3cfc1b..5bcbf8d16cd 100644 --- a/src/gallium/winsys/radeon/drm/radeon_winsys.h +++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h @@ -48,6 +48,7 @@ #define RADEON_FLUSH_ASYNC (1 << 0) #define RADEON_FLUSH_KEEP_TILING_FLAGS (1 << 1) /* needs DRM 2.12.0 */ #define RADEON_FLUSH_COMPUTE (1 << 2) +#define RADEON_FLUSH_END_OF_FRAME (1 << 3) /* Tiling flags. */ enum radeon_bo_layout { |