diff options
| author | Christian König <[email protected]> | 2012-05-21 17:51:52 +0200 |
|---|---|---|
| committer | Christian König <[email protected]> | 2012-06-15 09:52:38 +0200 |
| commit | 92af184690995d3b16731518f7becfaac3538edb (patch) | |
| tree | c0103bccb32d353c0d5445c8bf8cae59d569f059 /src/gallium/winsys | |
| parent | b4753dafcce4fc771ec3d7e3d5781bd4cae20326 (diff) | |
winsys/radeon: enable IB submission to compute rings v2
This allows to submit things to the compute only
rings on cayman+
v2: rebased on current master and actually make use
of the new flag in evergreen_compute.c
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/winsys')
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 15 | ||||
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_cs.h | 2 | ||||
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_winsys.h | 5 |
3 files changed, 15 insertions, 7 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c index b598e6cf281..186c5bce9ca 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c @@ -81,6 +81,8 @@ /* The first dword of RADEON_CHUNK_ID_FLAGS is a uint32 of these flags: */ #define RADEON_CS_KEEP_TILING_FLAGS 0x01 + + #endif #ifndef RADEON_CS_USE_VM @@ -118,7 +120,7 @@ static boolean radeon_init_cs_context(struct radeon_cs_context *csc, csc->chunks[1].length_dw = 0; csc->chunks[1].chunk_data = (uint64_t)(uintptr_t)csc->relocs; csc->chunks[2].chunk_id = RADEON_CHUNK_ID_FLAGS; - csc->chunks[2].length_dw = 1; + csc->chunks[2].length_dw = 2; csc->chunks[2].chunk_data = (uint64_t)(uintptr_t)&csc->flags; csc->chunk_array[0] = (uint64_t)(uintptr_t)&csc->chunks[0]; @@ -454,15 +456,20 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags) p_atomic_inc(&cs->cst->relocs_bo[i]->num_active_ioctls); } - cs->cst->flags = 0; + cs->cst->flags[0] = 0; + cs->cst->flags[1] = RADEON_CS_RING_GFX; cs->cst->cs.num_chunks = 2; if (flags & RADEON_FLUSH_KEEP_TILING_FLAGS) { - cs->cst->flags |= RADEON_CS_KEEP_TILING_FLAGS; + cs->cst->flags[0] |= RADEON_CS_KEEP_TILING_FLAGS; cs->cst->cs.num_chunks = 3; } if (cs->ws->info.r600_virtual_address) { + cs->cst->flags[0] |= RADEON_CS_USE_VM; + cs->cst->cs.num_chunks = 3; + } + if (flags & RADEON_FLUSH_COMPUTE) { + cs->cst->flags[1] = RADEON_CS_RING_COMPUTE; cs->cst->cs.num_chunks = 3; - cs->cst->flags |= RADEON_CS_USE_VM; } if (cs->thread && diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.h b/src/gallium/winsys/radeon/drm/radeon_drm_cs.h index 05b9a487645..5ce000215e1 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.h +++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.h @@ -37,7 +37,7 @@ struct radeon_cs_context { struct drm_radeon_cs cs; struct drm_radeon_cs_chunk chunks[3]; uint64_t chunk_array[3]; - uint32_t flags; + uint32_t flags[2]; /* Relocs. */ unsigned nrelocs; diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h index 73160b63a27..4aa7cfc5f61 100644 --- a/src/gallium/winsys/radeon/drm/radeon_winsys.h +++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h @@ -45,8 +45,9 @@ #define RADEON_MAX_CMDBUF_DWORDS (16 * 1024) -#define RADEON_FLUSH_ASYNC (1 << 0) -#define RADEON_FLUSH_KEEP_TILING_FLAGS (1 << 1) /* needs DRM 2.12.0 */ +#define RADEON_FLUSH_ASYNC (1 << 0) +#define RADEON_FLUSH_KEEP_TILING_FLAGS (1 << 1) /* needs DRM 2.12.0 */ +#define RADEON_FLUSH_COMPUTE (1 << 2) /* Tiling flags. */ enum radeon_bo_layout { |