diff options
| author | Jerome Glisse <[email protected]> | 2010-09-24 16:17:28 -0400 |
|---|---|---|
| committer | Jerome Glisse <[email protected]> | 2010-09-24 16:17:28 -0400 |
| commit | 3ad4486bfeea0d38f0789431e5e8fc1e6579e3aa (patch) | |
| tree | 54e96dbf953be8d9088ae5e80a3417b0b5277892 /src/gallium/winsys | |
| parent | 49111213e483e4f7830f77f53fc4331a57a296e3 (diff) | |
r600g: fix evergreen new path
glxgears seems to work, had somelockup but now they seems to have vanish.
Signed-off-by: Jerome Glisse <[email protected]>
Diffstat (limited to 'src/gallium/winsys')
| -rw-r--r-- | src/gallium/winsys/r600/drm/evergreen_state.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/src/gallium/winsys/r600/drm/evergreen_state.c b/src/gallium/winsys/r600/drm/evergreen_state.c index 96e2105cd18..f2038638d6b 100644 --- a/src/gallium/winsys/r600/drm/evergreen_state.c +++ b/src/gallium/winsys/r600/drm/evergreen_state.c @@ -85,12 +85,19 @@ static const struct r600_reg evergreen_reg_list[] = { {0, 0, R_02802C_DB_DEPTH_CLEAR}, {0, 0, R_028030_PA_SC_SCREEN_SCISSOR_TL}, {0, 0, R_028034_PA_SC_SCREEN_SCISSOR_BR}, + {0, 0, GROUP_FORCE_NEW_BLOCK}, {1, 0, R_028040_DB_Z_INFO}, + {0, 0, GROUP_FORCE_NEW_BLOCK}, {0, 0, R_028044_DB_STENCIL_INFO}, + {0, 0, GROUP_FORCE_NEW_BLOCK}, {1, 0, R_028048_DB_Z_READ_BASE}, + {0, 0, GROUP_FORCE_NEW_BLOCK}, {1, 0, R_02804C_DB_STENCIL_READ_BASE}, + {0, 0, GROUP_FORCE_NEW_BLOCK}, {1, 0, R_028050_DB_Z_WRITE_BASE}, + {0, 0, GROUP_FORCE_NEW_BLOCK}, {1, 0, R_028054_DB_STENCIL_WRITE_BASE}, + {0, 0, GROUP_FORCE_NEW_BLOCK}, {0, 0, R_028058_DB_DEPTH_SIZE}, {0, 0, R_02805C_DB_DEPTH_SLICE}, {0, 0, R_028140_ALU_CONST_BUFFER_SIZE_PS_0}, @@ -261,14 +268,14 @@ static const struct r600_reg evergreen_reg_list[] = { {0, 0, R_02881C_PA_CL_VS_OUT_CNTL}, {0, 0, R_028820_PA_CL_NANINF_CNTL}, {0, 0, R_028838_SQ_DYN_GPR_RESOURCE_LIMIT_1}, - {1, 0, R_028840_SQ_PGM_START_PS}, + {1, S_0085F0_SH_ACTION_ENA(1), R_028840_SQ_PGM_START_PS}, {0, 0, R_028844_SQ_PGM_RESOURCES_PS}, {0, 0, R_028848_SQ_PGM_RESOURCES_2_PS}, {0, 0, R_02884C_SQ_PGM_EXPORTS_PS}, - {1, 0, R_02885C_SQ_PGM_START_VS}, + {1, S_0085F0_SH_ACTION_ENA(1), R_02885C_SQ_PGM_START_VS}, {0, 0, R_028860_SQ_PGM_RESOURCES_VS}, {0, 0, R_028864_SQ_PGM_RESOURCES_2_VS}, - {1, 0, R_0288A4_SQ_PGM_START_FS}, + {1, S_0085F0_SH_ACTION_ENA(1), R_0288A4_SQ_PGM_START_FS}, {0, 0, R_0288A8_SQ_PGM_RESOURCES_FS}, {0, 0, R_0288EC_SQ_LDS_ALLOC_PS}, {0, 0, R_028900_SQ_ESGS_RING_ITEMSIZE}, |