pb_buffer: inline 'base' sub-struct

4 files changed, 15 insertions, 15 deletions

diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c
index 6c5b4b8953a..5d415ae6348 100644
--- a/src/gallium/winsys/r600/drm/r600_hw_context.c
+++ b/src/gallium/winsys/r600/drm/r600_hw_context.c
@@ -982,7 +982,7 @@ void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags,
 	} else {
 		ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_SURFACE_SYNC, 3, ctx->predicate_drawing);
 		ctx->pm4[ctx->pm4_cdwords++] = flush_flags;
-		ctx->pm4[ctx->pm4_cdwords++] = (bo->buf->base.size + 255) >> 8;
+		ctx->pm4[ctx->pm4_cdwords++] = (bo->buf->size + 255) >> 8;
 		ctx->pm4[ctx->pm4_cdwords++] = 0x00000000;
 		ctx->pm4[ctx->pm4_cdwords++] = 0x0000000A;
 		ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_NOP, 0, ctx->predicate_drawing);
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index b45efe5f49c..1dc6eeb4cb0 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -356,10 +356,10 @@ static struct pb_buffer *radeon_bomgr_create_bo(struct pb_manager *_mgr,
     if (!bo)
 	return NULL;
 
-    pipe_reference_init(&bo->base.base.reference, 1);
-    bo->base.base.alignment = desc->alignment;
-    bo->base.base.usage = desc->usage;
-    bo->base.base.size = size;
+    pipe_reference_init(&bo->base.reference, 1);
+    bo->base.alignment = desc->alignment;
+    bo->base.usage = desc->usage;
+    bo->base.size = size;
     bo->base.vtbl = &radeon_bo_vtbl;
     bo->mgr = mgr;
     bo->rws = mgr->rws;
@@ -592,10 +592,10 @@ static struct pb_buffer *radeon_winsys_bo_from_handle(struct radeon_winsys *rws,
     bo->name = whandle->handle;
 
     /* Initialize it. */
-    pipe_reference_init(&bo->base.base.reference, 1);
-    bo->base.base.alignment = 0;
-    bo->base.base.usage = PB_USAGE_GPU_WRITE | PB_USAGE_GPU_READ;
-    bo->base.base.size = bo->size;
+    pipe_reference_init(&bo->base.reference, 1);
+    bo->base.alignment = 0;
+    bo->base.usage = PB_USAGE_GPU_WRITE | PB_USAGE_GPU_READ;
+    bo->base.size = bo->size;
     bo->base.vtbl = &radeon_bo_vtbl;
     bo->mgr = mgr;
     bo->rws = mgr->rws;
@@ -609,7 +609,7 @@ done:
     if (stride)
         *stride = whandle->stride;
     if (size)
-        *size = bo->base.base.size;
+        *size = bo->base.size;
 
     return (struct pb_buffer*)bo;
 
diff --git a/src/gallium/winsys/svga/drm/vmw_buffer.c b/src/gallium/winsys/svga/drm/vmw_buffer.c
index 80d5dfc3ed4..69f0787c49d 100644
--- a/src/gallium/winsys/svga/drm/vmw_buffer.c
+++ b/src/gallium/winsys/svga/drm/vmw_buffer.c
@@ -193,10 +193,10 @@ vmw_gmr_bufmgr_create_buffer(struct pb_manager *_mgr,
    if(!buf)
       goto error1;
 
-   pipe_reference_init(&buf->base.base.reference, 1);
-   buf->base.base.alignment = desc->alignment;
-   buf->base.base.usage = desc->usage;
-   buf->base.base.size = size;
+   pipe_reference_init(&buf->base.reference, 1);
+   buf->base.alignment = desc->alignment;
+   buf->base.usage = desc->usage;
+   buf->base.size = size;
    buf->base.vtbl = &vmw_gmr_buffer_vtbl;
    buf->mgr = mgr;
 
diff --git a/src/gallium/winsys/svga/drm/vmw_context.c b/src/gallium/winsys/svga/drm/vmw_context.c
index f2124c1bf65..633ef385a69 100644
--- a/src/gallium/winsys/svga/drm/vmw_context.c
+++ b/src/gallium/winsys/svga/drm/vmw_context.c
@@ -319,7 +319,7 @@ vmw_swc_region_relocation(struct svga_winsys_context *swc,
     * SVGA virtual device it's not a performance issue since flushing commands
     * to the FIFO won't cause flushing in the host.
     */
-   vswc->seen_regions += reloc->buffer->base.size;
+   vswc->seen_regions += reloc->buffer->size;
    if(vswc->seen_regions >= VMW_GMR_POOL_SIZE/3)
       vswc->preemptive_flush = TRUE;
 }