diff options
| author | Marek Olšák <[email protected]> | 2018-11-23 18:27:00 -0500 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2018-11-28 20:20:27 -0500 |
| commit | 8c00f778fc336344afda023e137f25958fb3cb75 (patch) | |
| tree | 833550f9f1e2ba7b507cddeff715d68dae9c9d92 /src/gallium/winsys | |
| parent | a2a6b06d4846cc0068422259efa4d0f8c9b47ec0 (diff) | |
winsys/amdgpu: increase the VM alignment to the MSB of the size for Gfx9
Reviewed-by: Christian König <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/gallium/winsys')
| -rw-r--r-- | src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c index e1b80971327..c2e237bb599 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c @@ -489,12 +489,22 @@ static struct amdgpu_winsys_bo *amdgpu_create_bo(struct amdgpu_winsys *ws, va_gap_size = ws->check_vm ? MAX2(4 * alignment, 64 * 1024) : 0; - unsigned vm_alignment = alignment; + uint64_t vm_alignment = alignment; /* Increase the VM alignment for faster address translation. */ if (size >= ws->info.pte_fragment_size) vm_alignment = MAX2(vm_alignment, ws->info.pte_fragment_size); + /* Gfx9: Increase the VM alignment to the most significant bit set + * in the size for faster address translation. + */ + if (ws->info.chip_class >= GFX9) { + unsigned msb = util_last_bit64(size); /* 0 = no bit is set */ + uint64_t msb_alignment = msb ? 1ull << (msb - 1) : 0; + + vm_alignment = MAX2(vm_alignment, msb_alignment); + } + r = amdgpu_va_range_alloc(ws->dev, amdgpu_gpu_va_range_general, size + va_gap_size, vm_alignment, 0, &va, &va_handle, (flags & RADEON_FLAG_32BIT ? AMDGPU_VA_RANGE_32_BIT : 0) | |