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authorMichel Dänzer <[email protected]>2014-08-26 18:06:49 +0900
committerMichel Dänzer <[email protected]>2014-09-02 15:24:07 +0900
commit51131c423c213c291106c7756558ac84654c24b4 (patch)
tree04fb197f19c1eb3ad281db5afdc89cba79f0d4bd /src/gallium/winsys
parent2d5d1f55983f645df97f0b44ab95235d30faa7bf (diff)
r600g,radeonsi: Inform the kernel if a BO will likely be accessed by the CPU
This allows the kernel to prevent such BOs from ever being stored in the CPU inaccessible part of VRAM. Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/winsys')
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_bo.c8
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_winsys.h3
2 files changed, 9 insertions, 2 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index 73f8d385d7b..03b9b1d075b 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -478,7 +478,11 @@ const struct pb_vtbl radeon_bo_vtbl = {
};
#ifndef RADEON_GEM_GTT_WC
-#define RADEON_GEM_GTT_WC (1 << 2)
+#define RADEON_GEM_GTT_WC (1 << 2)
+#endif
+#ifndef RADEON_GTM_CPU_ACCESS
+/* BO is expected to be accessed by the CPU */
+#define RADEON_GEM_CPU_ACCESS (1 << 3)
#endif
static struct pb_buffer *radeon_bomgr_create_bo(struct pb_manager *_mgr,
@@ -505,6 +509,8 @@ static struct pb_buffer *radeon_bomgr_create_bo(struct pb_manager *_mgr,
if (rdesc->flags & RADEON_FLAG_GTT_WC)
args.flags |= RADEON_GEM_GTT_WC;
+ if (rdesc->flags & RADEON_FLAG_CPU_ACCESS)
+ args.flags |= RADEON_GEM_CPU_ACCESS;
if (drmCommandWriteRead(rws->fd, DRM_RADEON_GEM_CREATE,
&args, sizeof(args))) {
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index dbd58f1cd8d..69bf6eddebd 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -66,7 +66,8 @@ enum radeon_bo_domain { /* bitfield */
};
enum radeon_bo_flag { /* bitfield */
- RADEON_FLAG_GTT_WC = (1 << 0)
+ RADEON_FLAG_GTT_WC = (1 << 0),
+ RADEON_FLAG_CPU_ACCESS = (1 << 1),
};
enum radeon_bo_usage { /* bitfield */