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authorRob Clark <[email protected]>2016-07-13 12:17:05 -0400
committerRob Clark <[email protected]>2016-07-16 10:00:04 -0400
commit44bbfedbd9983c61f6a461cbfe2e0dc74eda6d37 (patch)
tree54af9e04c52b8e9f2cedc72515bc13ba846fb8eb /src/gallium/winsys
parent6f73c7595fab450ae9fd1af67aaed322bca02ee0 (diff)
gallium/u_queue: add optional cleanup callback
Adds a second optional cleanup callback, called after the fence is signaled. This is needed if, for example, the queue has the last reference to the object that embeds the util_queue_fence. In this case we cannot drop the ref in the main callback, since that would result in the fence being destroyed before it is signaled. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/winsys')
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_cs.c2
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_cs.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index 1a094fd8d21..fb517b9ac54 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -1058,7 +1058,7 @@ static int amdgpu_cs_flush(struct radeon_winsys_cs *rcs,
if ((flags & RADEON_FLUSH_ASYNC) &&
util_queue_is_initialized(&ws->cs_queue)) {
util_queue_add_job(&ws->cs_queue, cs, &cs->flush_completed,
- amdgpu_cs_submit_ib);
+ amdgpu_cs_submit_ib, NULL);
} else {
amdgpu_cs_submit_ib(cs, 0);
error_code = cs->cst->error_code;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index 767c263a33d..15c3e5cd0d0 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -587,7 +587,7 @@ static int radeon_drm_cs_flush(struct radeon_winsys_cs *rcs,
if (util_queue_is_initialized(&cs->ws->cs_queue)) {
util_queue_add_job(&cs->ws->cs_queue, cs, &cs->flush_completed,
- radeon_drm_cs_emit_ioctl_oneshot);
+ radeon_drm_cs_emit_ioctl_oneshot, NULL);
if (!(flags & RADEON_FLUSH_ASYNC))
radeon_drm_cs_sync_flush(rcs);
} else {