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author | Kristian H. Kristensen <[email protected]> | 2019-03-26 10:31:54 -0700 |
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committer | Kristian H. Kristensen <[email protected]> | 2019-03-27 13:26:02 -0700 |
commit | 3c8779af325965a6c200b14ab4cc44c8f0b835e8 (patch) | |
tree | 966fc49e79794464ada647ed814f1606022ece02 /src/gallium/winsys/vc4 | |
parent | 56b4bc292f1994619d6a9779f15e6b2c5180b1de (diff) |
freedreno/ir3: Enable PIPE_CAP_PACKED_UNIFORMS
This commit turns on the gallium cap and adds a pass to lower the
load_ubo intrinsics for block 0 back to load_uniform intrinsics and
adjust the backend where the cap switches units from vec4s to dwords.
As we stop using ir3_glsl_type_size() for uniform layout, this also
corrects an issue where we would allocate a vec4 slot for samplers in
uniforms, fixing:
dEQP-GLES3.functional.shaders.struct.uniform.sampler_array_fragment
dEQP-GLES3.functional.shaders.struct.uniform.sampler_array_vertex
dEQP-GLES3.functional.shaders.struct.uniform.sampler_nested_fragment
dEQP-GLES2.functional.shaders.struct.uniform.sampler_nested_vertex
dEQP-GLES2.functional.shaders.struct.uniform.sampler_nested_fragment
Signed-off-by: Kristian H. Kristensen <[email protected]>
Reviewed-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/winsys/vc4')
0 files changed, 0 insertions, 0 deletions