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authorMarek Olšák <[email protected]>2017-02-15 18:22:27 +0100
committerMarek Olšák <[email protected]>2017-02-18 01:22:08 +0100
commit6b73aafceb1eb8e81754e2f349826994de678466 (patch)
tree8867b645888363ea28c3e1f87ac270ead32403ca /src/gallium/winsys/radeon
parent620aded541a5b81df74575888754094fea2f2ae2 (diff)
radeonsi: use a clever alignment for constant buffer uploads
This results in a very tiny decrease in lgkm wait cycles. Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/winsys/radeon')
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_winsys.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 6c077ea0abc..a39a7bed5f4 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -524,6 +524,7 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws)
ws->info.gfx_ib_pad_with_type2 = ws->info.chip_class <= SI ||
(ws->info.family == CHIP_HAWAII &&
ws->accel_working2 < 3);
+ ws->info.tcc_cache_line_size = 64; /* TC L2 line size on GCN */
ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL;