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authorMarek Olšák <[email protected]>2018-05-02 19:54:35 -0400
committerMarek Olšák <[email protected]>2018-05-10 18:40:10 -0400
commit9b1fdfc541ed0eb62632e893b2142500bb003453 (patch)
treeb6ebd09c3b782f8153d29fe312e585409feb35e2 /src/gallium/winsys/radeon
parentd26696283d494822f2df72a6b94d51e70f91c4d9 (diff)
ac/gpu_info: add has_2d_tiling
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/winsys/radeon')
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_winsys.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 3585b35af36..cb8c7ce9fcb 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -548,6 +548,8 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws)
ws->info.has_unaligned_shader_loads = ws->info.chip_class == CIK &&
ws->info.drm_minor >= 50;
ws->info.has_sparse_vm_mappings = false;
+ /* 2D tiling on CIK is supported since DRM 2.35.0 */
+ ws->info.has_2d_tiling = ws->info.chip_class <= SI || ws->info.drm_minor >= 35;
ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL;