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authorMarek Olšák <[email protected]>2016-05-01 15:47:30 +0200
committerMarek Olšák <[email protected]>2016-05-02 22:49:25 +0200
commit5541e11b9a1a4aa3b785d5d426276f9eb4795b61 (patch)
tree09f5dd9c4caa28b0e6f56fd8b7be7d7bb29fc9bd /src/gallium/winsys/radeon
parent20a77397fac5c208761217a4e90ffc7eeb5b9032 (diff)
gallium/radeon: remove stencil_tile_split from metadata
this is a leftover from the days when depth-stencil buffers were allocated by the DDX Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src/gallium/winsys/radeon')
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_bo.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index 2c3098e4695..dd41dc77541 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -665,7 +665,6 @@ static void radeon_bo_get_metadata(struct pb_buffer *_buf,
md->bankw = (args.tiling_flags >> RADEON_TILING_EG_BANKW_SHIFT) & RADEON_TILING_EG_BANKW_MASK;
md->bankh = (args.tiling_flags >> RADEON_TILING_EG_BANKH_SHIFT) & RADEON_TILING_EG_BANKH_MASK;
md->tile_split = (args.tiling_flags >> RADEON_TILING_EG_TILE_SPLIT_SHIFT) & RADEON_TILING_EG_TILE_SPLIT_MASK;
- md->stencil_tile_split = (args.tiling_flags >> RADEON_TILING_EG_STENCIL_TILE_SPLIT_SHIFT) & RADEON_TILING_EG_STENCIL_TILE_SPLIT_MASK;
md->mtilea = (args.tiling_flags >> RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT) & RADEON_TILING_EG_MACRO_TILE_ASPECT_MASK;
md->tile_split = eg_tile_split(md->tile_split);
md->scanout = bo->rws->gen >= DRV_SI && !(args.tiling_flags & RADEON_TILING_R600_NO_SCANOUT);
@@ -698,9 +697,6 @@ static void radeon_bo_set_metadata(struct pb_buffer *_buf,
RADEON_TILING_EG_TILE_SPLIT_MASK) <<
RADEON_TILING_EG_TILE_SPLIT_SHIFT;
}
- args.tiling_flags |= (md->stencil_tile_split &
- RADEON_TILING_EG_STENCIL_TILE_SPLIT_MASK) <<
- RADEON_TILING_EG_STENCIL_TILE_SPLIT_SHIFT;
args.tiling_flags |= (md->mtilea & RADEON_TILING_EG_MACRO_TILE_ASPECT_MASK) <<
RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT;