diff options
| author | Michel Dänzer <[email protected]> | 2012-05-16 23:52:19 +0200 |
|---|---|---|
| committer | Michel Dänzer <[email protected]> | 2012-05-16 23:52:19 +0200 |
| commit | 7446a0407d4e61a826385c11ed6c401837baf095 (patch) | |
| tree | baf62a7f3b96590731e183a6cc1c75ab53192928 /src/gallium/winsys/radeon | |
| parent | 03e3bc4ba56f1021899a5f773b6ec21893619e3a (diff) | |
gallium/radeon: Fix r300g tiling breakage.
Commit 11f056a3f0b87e86267efa8b5ac9d36a343c9dc1 broke the r300g build. Fix it
up, and reinstate some code which isn't needed by r600g and radeonsi but is
by r300g.
Diffstat (limited to 'src/gallium/winsys/radeon')
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 16 | ||||
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_winsys.h | 1 |
2 files changed, 14 insertions, 3 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c index 86d35c19de6..2626586afd6 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c @@ -684,6 +684,7 @@ static void radeon_bo_get_tiling(struct pb_buffer *_buf, } static void radeon_bo_set_tiling(struct pb_buffer *_buf, + struct radeon_winsys_cs *rcs, enum radeon_bo_layout microtiled, enum radeon_bo_layout macrotiled, unsigned bankw, unsigned bankh, @@ -693,10 +694,17 @@ static void radeon_bo_set_tiling(struct pb_buffer *_buf, uint32_t pitch) { struct radeon_bo *bo = get_radeon_bo(_buf); + struct radeon_drm_cs *cs = radeon_drm_cs(rcs); struct drm_radeon_gem_set_tiling args; memset(&args, 0, sizeof(args)); + /* Tiling determines how DRM treats the buffer data. + * We must flush CS when changing it if the buffer is referenced. */ + if (cs && radeon_bo_is_referenced_by_cs(cs, bo)) { + cs->flush_cs(cs->flush_data, 0); + } + while (p_atomic_read(&bo->num_active_ioctls)) { sched_yield(); } @@ -713,9 +721,11 @@ static void radeon_bo_set_tiling(struct pb_buffer *_buf, RADEON_TILING_EG_BANKW_SHIFT; args.tiling_flags |= (bankh & RADEON_TILING_EG_BANKH_MASK) << RADEON_TILING_EG_BANKH_SHIFT; - args.tiling_flags |= (eg_tile_split_rev(tile_split) & - RADEON_TILING_EG_TILE_SPLIT_MASK) << - RADEON_TILING_EG_TILE_SPLIT_SHIFT; + if (tile_split) { + args.tiling_flags |= (eg_tile_split_rev(tile_split) & + RADEON_TILING_EG_TILE_SPLIT_MASK) << + RADEON_TILING_EG_TILE_SPLIT_SHIFT; + } args.tiling_flags |= (stencil_tile_split & RADEON_TILING_EG_STENCIL_TILE_SPLIT_MASK) << RADEON_TILING_EG_STENCIL_TILE_SPLIT_SHIFT; diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h index 443b20e25b9..73160b63a27 100644 --- a/src/gallium/winsys/radeon/drm/radeon_winsys.h +++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h @@ -219,6 +219,7 @@ struct radeon_winsys { * \note microtile and macrotile are not bitmasks! */ void (*buffer_set_tiling)(struct pb_buffer *buf, + struct radeon_winsys_cs *rcs, enum radeon_bo_layout microtile, enum radeon_bo_layout macrotile, unsigned bankw, unsigned bankh, |