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authorMarek Olšák <[email protected]>2016-02-24 00:58:38 +0100
committerMarek Olšák <[email protected]>2016-03-09 15:02:25 +0100
commit6011d7cf2528a02f1737b25bc180c2076a076173 (patch)
tree88a63767c6deb990e2a5eda804de5f0f900e3454 /src/gallium/winsys/radeon
parent260ef9c9bec8695d5988a91443988516d39d0240 (diff)
gallium/radeon: remove rcs parameter from radeon_winsys::buffer_set_tiling
This was needed for DRM < 2.12.0 where the kernel was rewriting tiling flags in IBs. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/winsys/radeon')
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_bo.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index ce91af4486f..cd769f7ade9 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -671,21 +671,13 @@ static void radeon_bo_get_tiling(struct pb_buffer *_buf,
}
static void radeon_bo_set_tiling(struct pb_buffer *_buf,
- struct radeon_winsys_cs *rcs,
struct radeon_bo_metadata *md)
{
struct radeon_bo *bo = radeon_bo(_buf);
- struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
struct drm_radeon_gem_set_tiling args;
memset(&args, 0, sizeof(args));
- /* Tiling determines how DRM treats the buffer data.
- * We must flush CS when changing it if the buffer is referenced. */
- if (cs && radeon_bo_is_referenced_by_cs(cs, bo)) {
- cs->flush_cs(cs->flush_data, 0, NULL);
- }
-
os_wait_until_zero(&bo->num_active_ioctls, PIPE_TIMEOUT_INFINITE);
if (md->microtile == RADEON_LAYOUT_TILED)