r300g: cleanup winsys

11 files changed, 443 insertions, 628 deletions

diff --git a/src/gallium/winsys/radeon/drm/Makefile b/src/gallium/winsys/radeon/drm/Makefile
index 7f69e392735..aa73edde34e 100644
--- a/src/gallium/winsys/radeon/drm/Makefile
+++ b/src/gallium/winsys/radeon/drm/Makefile
@@ -6,7 +6,7 @@ LIBNAME = radeonwinsys
 
 C_SOURCES = \
 	radeon_drm_buffer.c \
-	radeon_drm.c \
+	radeon_drm_common.c \
 	radeon_r300.c
 
 LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/r300 \
diff --git a/src/gallium/winsys/radeon/drm/SConscript b/src/gallium/winsys/radeon/drm/SConscript
index 60e409fe10f..2dbf61a7ba3 100644
--- a/src/gallium/winsys/radeon/drm/SConscript
+++ b/src/gallium/winsys/radeon/drm/SConscript
@@ -4,7 +4,7 @@ env = env.Clone()
 
 radeon_sources = [
     'radeon_drm_buffer.c',
-    'radeon_drm.c',
+    'radeon_drm_common.c',
     'radeon_r300.c',
 ]
 
diff --git a/src/gallium/winsys/radeon/drm/radeon_buffer.h b/src/gallium/winsys/radeon/drm/radeon_buffer.h
deleted file mode 100644
index 59edbcadbc9..00000000000
--- a/src/gallium/winsys/radeon/drm/radeon_buffer.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Copyright © 2008 Jérôme Glisse
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
- * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- */
-/*
- * Authors:
- *      Jérôme Glisse <[email protected]>
- */
-#ifndef RADEON_BUFFER_H
-#define RADEON_BUFFER_H
-
-#include <stdio.h>
-
-#include "pipe/p_defines.h"
-#include "util/u_inlines.h"
-
-#include "pipebuffer/pb_buffer.h"
-#include "pipebuffer/pb_bufmgr.h"
-
-#include "radeon_bo.h"
-#include "radeon_cs.h"
-
-#include "radeon_winsys.h"
-
-#define RADEON_PB_USAGE_VERTEX      (1 << 28)
-#define RADEON_PB_USAGE_DOMAIN_GTT  (1 << 29)
-#define RADEON_PB_USAGE_DOMAIN_VRAM (1 << 30)
-
-static INLINE struct pb_buffer *
-radeon_pb_buffer(struct r300_winsys_buffer *buffer)
-{
-    return (struct pb_buffer *)buffer;
-}
-
-static INLINE struct r300_winsys_buffer *
-radeon_libdrm_winsys_buffer(struct pb_buffer *buffer)
-{
-    return (struct r300_winsys_buffer *)buffer;
-}
-
-struct pb_manager *
-radeon_drm_bufmgr_create(struct radeon_libdrm_winsys *rws);
-
-void radeon_drm_bufmgr_add_buffer(struct r300_winsys_cs *cs,
-                                  struct r300_winsys_cs_buffer *buf,
-                                  enum r300_buffer_domain rd,
-                                  enum r300_buffer_domain wd);
-
-void radeon_drm_bufmgr_write_reloc(struct r300_winsys_cs *cs,
-                                   struct r300_winsys_cs_buffer *buf,
-				   enum r300_buffer_domain rd,
-                                   enum r300_buffer_domain wd);
-
-struct pb_buffer *radeon_drm_bufmgr_create_buffer_from_handle(struct pb_manager *_mgr,
-							      uint32_t handle);
-
-void radeon_drm_bufmgr_get_tiling(struct r300_winsys_screen *ws,
-                                  struct r300_winsys_buffer *buf,
-                                  enum r300_buffer_tiling *microtiled,
-                                  enum r300_buffer_tiling *macrotiled);
-
-void radeon_drm_bufmgr_set_tiling(struct r300_winsys_screen *ws,
-                                  struct r300_winsys_buffer *buf,
-                                  enum r300_buffer_tiling microtiled,
-                                  enum r300_buffer_tiling macrotiled,
-                                  uint32_t pitch);
-
-void radeon_drm_bufmgr_flush_maps(struct pb_manager *_mgr);
-
-boolean radeon_drm_bufmgr_get_handle(struct pb_buffer *_buf,
-				     struct winsys_handle *whandle);
-
-boolean radeon_drm_bufmgr_is_buffer_referenced(struct r300_winsys_cs *cs,
-                                               struct r300_winsys_cs_buffer *buf,
-                                               enum r300_reference_domain domain);
-
-void radeon_drm_bufmgr_wait(struct r300_winsys_screen *ws,
-                            struct r300_winsys_buffer *buf);
-
-void *radeon_drm_buffer_map(struct r300_winsys_screen *ws,
-                            struct r300_winsys_buffer *buf,
-                            struct r300_winsys_cs *cs,
-                            enum pipe_transfer_usage usage);
-
-void radeon_drm_buffer_unmap(struct r300_winsys_screen *ws,
-                             struct r300_winsys_buffer *buf);
-
-struct r300_winsys_cs_buffer *radeon_drm_get_cs_handle(
-        struct r300_winsys_screen *rws,
-        struct r300_winsys_buffer *_buf);
-
-#endif
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm.h b/src/gallium/winsys/radeon/drm/radeon_drm.h
deleted file mode 100644
index 061229f1615..00000000000
--- a/src/gallium/winsys/radeon/drm/radeon_drm.h
+++ /dev/null
@@ -1,250 +0,0 @@
-/* 
- * Copyright © 2009 Corbin Simpson
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
- * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- */
-/*
- * Authors:
- *      Corbin Simpson <[email protected]>
- */
-#ifndef RADEON_DRM_H
-#define RADEON_DRM_H
-
-#include "state_tracker/drm_driver.h"
-
-/* Guess at whether this chipset should use r300g.
- *
- * I believe that this check is valid, but I haven't been exhaustive. */
-static INLINE boolean is_r3xx(int pciid)
-{
-      switch (pciid) {
-      case 0x4144: /* PCI_CHIP_R300_AD */
-      case 0x4145: /* PCI_CHIP_R300_AE */
-      case 0x4146: /* PCI_CHIP_R300_AF */
-      case 0x4147: /* PCI_CHIP_R300_AG */
-      case 0x4E44: /* PCI_CHIP_R300_ND */
-      case 0x4E45: /* PCI_CHIP_R300_NE */
-      case 0x4E46: /* PCI_CHIP_R300_NF */
-      case 0x4E47: /* PCI_CHIP_R300_NG */
-      case 0x4E48: /* PCI_CHIP_R350_NH */
-      case 0x4E49: /* PCI_CHIP_R350_NI */
-      case 0x4E4B: /* PCI_CHIP_R350_NK */
-      case 0x4148: /* PCI_CHIP_R350_AH */
-      case 0x4149: /* PCI_CHIP_R350_AI */
-      case 0x414A: /* PCI_CHIP_R350_AJ */
-      case 0x414B: /* PCI_CHIP_R350_AK */
-      case 0x4E4A: /* PCI_CHIP_R360_NJ */
-      case 0x4150: /* PCI_CHIP_RV350_AP */
-      case 0x4151: /* PCI_CHIP_RV350_AQ */
-      case 0x4152: /* PCI_CHIP_RV350_AR */
-      case 0x4153: /* PCI_CHIP_RV350_AS */
-      case 0x4154: /* PCI_CHIP_RV350_AT */
-      case 0x4155: /* PCI_CHIP_RV350_AU */
-      case 0x4156: /* PCI_CHIP_RV350_AV */
-      case 0x4E50: /* PCI_CHIP_RV350_NP */
-      case 0x4E51: /* PCI_CHIP_RV350_NQ */
-      case 0x4E52: /* PCI_CHIP_RV350_NR */
-      case 0x4E53: /* PCI_CHIP_RV350_NS */
-      case 0x4E54: /* PCI_CHIP_RV350_NT */
-      case 0x4E56: /* PCI_CHIP_RV350_NV */
-      case 0x5460: /* PCI_CHIP_RV370_5460 */
-      case 0x5462: /* PCI_CHIP_RV370_5462 */
-      case 0x5464: /* PCI_CHIP_RV370_5464 */
-      case 0x5B60: /* PCI_CHIP_RV370_5B60 */
-      case 0x5B62: /* PCI_CHIP_RV370_5B62 */
-      case 0x5B63: /* PCI_CHIP_RV370_5B63 */
-      case 0x5B64: /* PCI_CHIP_RV370_5B64 */
-      case 0x5B65: /* PCI_CHIP_RV370_5B65 */
-      case 0x3150: /* PCI_CHIP_RV380_3150 */
-      case 0x3152: /* PCI_CHIP_RV380_3152 */
-      case 0x3154: /* PCI_CHIP_RV380_3154 */
-      case 0x3155: /* PCI_CHIP_RV380_3155 */
-      case 0x3E50: /* PCI_CHIP_RV380_3E50 */
-      case 0x3E54: /* PCI_CHIP_RV380_3E54 */
-      case 0x4A48: /* PCI_CHIP_R420_JH */
-      case 0x4A49: /* PCI_CHIP_R420_JI */
-      case 0x4A4A: /* PCI_CHIP_R420_JJ */
-      case 0x4A4B: /* PCI_CHIP_R420_JK */
-      case 0x4A4C: /* PCI_CHIP_R420_JL */
-      case 0x4A4D: /* PCI_CHIP_R420_JM */
-      case 0x4A4E: /* PCI_CHIP_R420_JN */
-      case 0x4A4F: /* PCI_CHIP_R420_JO */
-      case 0x4A50: /* PCI_CHIP_R420_JP */
-      case 0x4A54: /* PCI_CHIP_R420_JT */
-      case 0x5548: /* PCI_CHIP_R423_UH */
-      case 0x5549: /* PCI_CHIP_R423_UI */
-      case 0x554A: /* PCI_CHIP_R423_UJ */
-      case 0x554B: /* PCI_CHIP_R423_UK */
-      case 0x5550: /* PCI_CHIP_R423_5550 */
-      case 0x5551: /* PCI_CHIP_R423_UQ */
-      case 0x5552: /* PCI_CHIP_R423_UR */
-      case 0x5554: /* PCI_CHIP_R423_UT */
-      case 0x5D57: /* PCI_CHIP_R423_5D57 */
-      case 0x554C: /* PCI_CHIP_R430_554C */
-      case 0x554D: /* PCI_CHIP_R430_554D */
-      case 0x554E: /* PCI_CHIP_R430_554E */
-      case 0x554F: /* PCI_CHIP_R430_554F */
-      case 0x5D48: /* PCI_CHIP_R430_5D48 */
-      case 0x5D49: /* PCI_CHIP_R430_5D49 */
-      case 0x5D4A: /* PCI_CHIP_R430_5D4A */
-      case 0x5D4C: /* PCI_CHIP_R480_5D4C */
-      case 0x5D4D: /* PCI_CHIP_R480_5D4D */
-      case 0x5D4E: /* PCI_CHIP_R480_5D4E */
-      case 0x5D4F: /* PCI_CHIP_R480_5D4F */
-      case 0x5D50: /* PCI_CHIP_R480_5D50 */
-      case 0x5D52: /* PCI_CHIP_R480_5D52 */
-      case 0x4B49: /* PCI_CHIP_R481_4B49 */
-      case 0x4B4A: /* PCI_CHIP_R481_4B4A */
-      case 0x4B4B: /* PCI_CHIP_R481_4B4B */
-      case 0x4B4C: /* PCI_CHIP_R481_4B4C */
-      case 0x564A: /* PCI_CHIP_RV410_564A */
-      case 0x564B: /* PCI_CHIP_RV410_564B */
-      case 0x564F: /* PCI_CHIP_RV410_564F */
-      case 0x5652: /* PCI_CHIP_RV410_5652 */
-      case 0x5653: /* PCI_CHIP_RV410_5653 */
-      case 0x5657: /* PCI_CHIP_RV410_5657 */
-      case 0x5E48: /* PCI_CHIP_RV410_5E48 */
-      case 0x5E4A: /* PCI_CHIP_RV410_5E4A */
-      case 0x5E4B: /* PCI_CHIP_RV410_5E4B */
-      case 0x5E4C: /* PCI_CHIP_RV410_5E4C */
-      case 0x5E4D: /* PCI_CHIP_RV410_5E4D */
-      case 0x5E4F: /* PCI_CHIP_RV410_5E4F */
-      case 0x5A41: /* PCI_CHIP_RS400_5A41 */
-      case 0x5A42: /* PCI_CHIP_RS400_5A42 */
-      case 0x5A61: /* PCI_CHIP_RC410_5A61 */
-      case 0x5A62: /* PCI_CHIP_RC410_5A62 */
-      case 0x5954: /* PCI_CHIP_RS480_5954 */
-      case 0x5955: /* PCI_CHIP_RS480_5955 */
-      case 0x5974: /* PCI_CHIP_RS482_5974 */
-      case 0x5975: /* PCI_CHIP_RS482_5975 */
-      case 0x7100: /* PCI_CHIP_R520_7100 */
-      case 0x7101: /* PCI_CHIP_R520_7101 */
-      case 0x7102: /* PCI_CHIP_R520_7102 */
-      case 0x7103: /* PCI_CHIP_R520_7103 */
-      case 0x7104: /* PCI_CHIP_R520_7104 */
-      case 0x7105: /* PCI_CHIP_R520_7105 */
-      case 0x7106: /* PCI_CHIP_R520_7106 */
-      case 0x7108: /* PCI_CHIP_R520_7108 */
-      case 0x7109: /* PCI_CHIP_R520_7109 */
-      case 0x710A: /* PCI_CHIP_R520_710A */
-      case 0x710B: /* PCI_CHIP_R520_710B */
-      case 0x710C: /* PCI_CHIP_R520_710C */
-      case 0x710E: /* PCI_CHIP_R520_710E */
-      case 0x710F: /* PCI_CHIP_R520_710F */
-      case 0x7140: /* PCI_CHIP_RV515_7140 */
-      case 0x7141: /* PCI_CHIP_RV515_7141 */
-      case 0x7142: /* PCI_CHIP_RV515_7142 */
-      case 0x7143: /* PCI_CHIP_RV515_7143 */
-      case 0x7144: /* PCI_CHIP_RV515_7144 */
-      case 0x7145: /* PCI_CHIP_RV515_7145 */
-      case 0x7146: /* PCI_CHIP_RV515_7146 */
-      case 0x7147: /* PCI_CHIP_RV515_7147 */
-      case 0x7149: /* PCI_CHIP_RV515_7149 */
-      case 0x714A: /* PCI_CHIP_RV515_714A */
-      case 0x714B: /* PCI_CHIP_RV515_714B */
-      case 0x714C: /* PCI_CHIP_RV515_714C */
-      case 0x714D: /* PCI_CHIP_RV515_714D */
-      case 0x714E: /* PCI_CHIP_RV515_714E */
-      case 0x714F: /* PCI_CHIP_RV515_714F */
-      case 0x7151: /* PCI_CHIP_RV515_7151 */
-      case 0x7152: /* PCI_CHIP_RV515_7152 */
-      case 0x7153: /* PCI_CHIP_RV515_7153 */
-      case 0x715E: /* PCI_CHIP_RV515_715E */
-      case 0x715F: /* PCI_CHIP_RV515_715F */
-      case 0x7180: /* PCI_CHIP_RV515_7180 */
-      case 0x7181: /* PCI_CHIP_RV515_7181 */
-      case 0x7183: /* PCI_CHIP_RV515_7183 */
-      case 0x7186: /* PCI_CHIP_RV515_7186 */
-      case 0x7187: /* PCI_CHIP_RV515_7187 */
-      case 0x7188: /* PCI_CHIP_RV515_7188 */
-      case 0x718A: /* PCI_CHIP_RV515_718A */
-      case 0x718B: /* PCI_CHIP_RV515_718B */
-      case 0x718C: /* PCI_CHIP_RV515_718C */
-      case 0x718D: /* PCI_CHIP_RV515_718D */
-      case 0x718F: /* PCI_CHIP_RV515_718F */
-      case 0x7193: /* PCI_CHIP_RV515_7193 */
-      case 0x7196: /* PCI_CHIP_RV515_7196 */
-      case 0x719B: /* PCI_CHIP_RV515_719B */
-      case 0x719F: /* PCI_CHIP_RV515_719F */
-      case 0x7200: /* PCI_CHIP_RV515_7200 */
-      case 0x7210: /* PCI_CHIP_RV515_7210 */
-      case 0x7211: /* PCI_CHIP_RV515_7211 */
-      case 0x71C0: /* PCI_CHIP_RV530_71C0 */
-      case 0x71C1: /* PCI_CHIP_RV530_71C1 */
-      case 0x71C2: /* PCI_CHIP_RV530_71C2 */
-      case 0x71C3: /* PCI_CHIP_RV530_71C3 */
-      case 0x71C4: /* PCI_CHIP_RV530_71C4 */
-      case 0x71C5: /* PCI_CHIP_RV530_71C5 */
-      case 0x71C6: /* PCI_CHIP_RV530_71C6 */
-      case 0x71C7: /* PCI_CHIP_RV530_71C7 */
-      case 0x71CD: /* PCI_CHIP_RV530_71CD */
-      case 0x71CE: /* PCI_CHIP_RV530_71CE */
-      case 0x71D2: /* PCI_CHIP_RV530_71D2 */
-      case 0x71D4: /* PCI_CHIP_RV530_71D4 */
-      case 0x71D5: /* PCI_CHIP_RV530_71D5 */
-      case 0x71D6: /* PCI_CHIP_RV530_71D6 */
-      case 0x71DA: /* PCI_CHIP_RV530_71DA */
-      case 0x71DE: /* PCI_CHIP_RV530_71DE */
-      case 0x7281: /* PCI_CHIP_RV560_7281 */
-      case 0x7283: /* PCI_CHIP_RV560_7283 */
-      case 0x7287: /* PCI_CHIP_RV560_7287 */
-      case 0x7290: /* PCI_CHIP_RV560_7290 */
-      case 0x7291: /* PCI_CHIP_RV560_7291 */
-      case 0x7293: /* PCI_CHIP_RV560_7293 */
-      case 0x7297: /* PCI_CHIP_RV560_7297 */
-      case 0x7280: /* PCI_CHIP_RV570_7280 */
-      case 0x7288: /* PCI_CHIP_RV570_7288 */
-      case 0x7289: /* PCI_CHIP_RV570_7289 */
-      case 0x728B: /* PCI_CHIP_RV570_728B */
-      case 0x728C: /* PCI_CHIP_RV570_728C */
-      case 0x7240: /* PCI_CHIP_R580_7240 */
-      case 0x7243: /* PCI_CHIP_R580_7243 */
-      case 0x7244: /* PCI_CHIP_R580_7244 */
-      case 0x7245: /* PCI_CHIP_R580_7245 */
-      case 0x7246: /* PCI_CHIP_R580_7246 */
-      case 0x7247: /* PCI_CHIP_R580_7247 */
-      case 0x7248: /* PCI_CHIP_R580_7248 */
-      case 0x7249: /* PCI_CHIP_R580_7249 */
-      case 0x724A: /* PCI_CHIP_R580_724A */
-      case 0x724B: /* PCI_CHIP_R580_724B */
-      case 0x724C: /* PCI_CHIP_R580_724C */
-      case 0x724D: /* PCI_CHIP_R580_724D */
-      case 0x724E: /* PCI_CHIP_R580_724E */
-      case 0x724F: /* PCI_CHIP_R580_724F */
-      case 0x7284: /* PCI_CHIP_R580_7284 */
-      case 0x793F: /* PCI_CHIP_RS600_793F */
-      case 0x7941: /* PCI_CHIP_RS600_7941 */
-      case 0x7942: /* PCI_CHIP_RS600_7942 */
-      case 0x791E: /* PCI_CHIP_RS690_791E */
-      case 0x791F: /* PCI_CHIP_RS690_791F */
-      case 0x796C: /* PCI_CHIP_RS740_796C */
-      case 0x796D: /* PCI_CHIP_RS740_796D */
-      case 0x796E: /* PCI_CHIP_RS740_796E */
-      case 0x796F: /* PCI_CHIP_RS740_796F */
-	      return TRUE;
-      default:
-	      return FALSE;
-      }
-}
-
-#endif
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c b/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c
index 294d4fac7cd..dc4b51747f4 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c
@@ -1,19 +1,17 @@
-
-#include <sys/ioctl.h>
-#include "radeon_drm.h"
-#include "radeon_bo_gem.h"
 #include "radeon_cs_gem.h"
-#include "radeon_buffer.h"
+#include "radeon_drm_buffer.h"
 
 #include "util/u_hash_table.h"
-#include "util/u_inlines.h"
 #include "util/u_memory.h"
 #include "util/u_simple_list.h"
-#include "pipebuffer/pb_buffer.h"
 #include "pipebuffer/pb_bufmgr.h"
 #include "os/os_thread.h"
 
-#include "radeon_winsys.h"
+#include "state_tracker/drm_driver.h"
+
+#include <radeon_drm.h>
+#include <radeon_bo_gem.h>
+#include <sys/ioctl.h>
 
 struct radeon_drm_bufmgr;
 
@@ -45,7 +43,7 @@ struct radeon_drm_bufmgr {
     struct pb_manager base;
 
     /* Winsys. */
-    struct radeon_libdrm_winsys *rws;
+    struct radeon_drm_winsys *rws;
 
     /* List of mapped buffers and its mutex. */
     struct radeon_drm_buffer buffer_map_list;
@@ -115,7 +113,7 @@ radeon_drm_buffer_map_internal(struct pb_buffer *_buf,
 			       unsigned flags, void *flush_ctx)
 {
     struct radeon_drm_buffer *buf = radeon_drm_buffer(_buf);
-    struct radeon_libdrm_cs *cs = flush_ctx;
+    struct radeon_drm_cs *cs = flush_ctx;
     int write = 0;
 
     /* Note how we use radeon_bo_is_referenced_by_cs here. There are
@@ -225,7 +223,7 @@ radeon_drm_bufmgr_create_buffer_from_handle_unsafe(struct pb_manager *_mgr,
                                                    uint32_t handle)
 {
     struct radeon_drm_bufmgr *mgr = radeon_drm_bufmgr(_mgr);
-    struct radeon_libdrm_winsys *rws = mgr->rws;
+    struct radeon_drm_winsys *rws = mgr->rws;
     struct radeon_drm_buffer *buf;
     struct radeon_bo *bo;
 
@@ -284,7 +282,7 @@ radeon_drm_bufmgr_create_buffer(struct pb_manager *_mgr,
 				const struct pb_desc *desc)
 {
     struct radeon_drm_bufmgr *mgr = radeon_drm_bufmgr(_mgr);
-    struct radeon_libdrm_winsys *rws = mgr->rws;
+    struct radeon_drm_winsys *rws = mgr->rws;
     struct radeon_drm_buffer *buf;
     uint32_t domain;
 
@@ -345,7 +343,7 @@ static int handle_compare(void *key1, void *key2)
 }
 
 struct pb_manager *
-radeon_drm_bufmgr_create(struct radeon_libdrm_winsys *rws)
+radeon_drm_bufmgr_create(struct radeon_drm_winsys *rws)
 {
     struct radeon_drm_bufmgr *mgr;
 
@@ -383,18 +381,18 @@ static struct radeon_drm_buffer *get_drm_buffer(struct pb_buffer *_buf)
     return buf;
 }
 
-void *radeon_drm_buffer_map(struct r300_winsys_screen *ws,
-                            struct r300_winsys_buffer *buf,
-                            struct r300_winsys_cs *cs,
-                            enum pipe_transfer_usage usage)
+static void *radeon_drm_buffer_map(struct r300_winsys_screen *ws,
+                                   struct r300_winsys_buffer *buf,
+                                   struct r300_winsys_cs *cs,
+                                   enum pipe_transfer_usage usage)
 {
     struct pb_buffer *_buf = radeon_pb_buffer(buf);
 
-    return pb_map(_buf, get_pb_usage_from_transfer_flags(usage), radeon_libdrm_cs(cs));
+    return pb_map(_buf, get_pb_usage_from_transfer_flags(usage), radeon_drm_cs(cs));
 }
 
-void radeon_drm_buffer_unmap(struct r300_winsys_screen *ws,
-                             struct r300_winsys_buffer *buf)
+static void radeon_drm_buffer_unmap(struct r300_winsys_screen *ws,
+                                    struct r300_winsys_buffer *buf)
 {
     struct pb_buffer *_buf = radeon_pb_buffer(buf);
 
@@ -425,10 +423,10 @@ boolean radeon_drm_bufmgr_get_handle(struct pb_buffer *_buf,
     return TRUE;
 }
 
-void radeon_drm_bufmgr_get_tiling(struct r300_winsys_screen *ws,
-                                  struct r300_winsys_buffer *_buf,
-                                  enum r300_buffer_tiling *microtiled,
-                                  enum r300_buffer_tiling *macrotiled)
+static void radeon_drm_buffer_get_tiling(struct r300_winsys_screen *ws,
+                                         struct r300_winsys_buffer *_buf,
+                                         enum r300_buffer_tiling *microtiled,
+                                         enum r300_buffer_tiling *macrotiled)
 {
     struct radeon_drm_buffer *buf = get_drm_buffer(radeon_pb_buffer(_buf));
     uint32_t flags = 0, pitch;
@@ -444,11 +442,11 @@ void radeon_drm_bufmgr_get_tiling(struct r300_winsys_screen *ws,
 	*macrotiled = R300_BUFFER_TILED;
 }
 
-void radeon_drm_bufmgr_set_tiling(struct r300_winsys_screen *ws,
-                                  struct r300_winsys_buffer *_buf,
-                                  enum r300_buffer_tiling microtiled,
-                                  enum r300_buffer_tiling macrotiled,
-                                  uint32_t pitch)
+static void radeon_drm_buffer_set_tiling(struct r300_winsys_screen *ws,
+                                         struct r300_winsys_buffer *_buf,
+                                         enum r300_buffer_tiling microtiled,
+                                         enum r300_buffer_tiling macrotiled,
+                                         uint32_t pitch)
 {
     struct radeon_drm_buffer *buf = get_drm_buffer(radeon_pb_buffer(_buf));
     uint32_t flags = 0;
@@ -465,51 +463,36 @@ void radeon_drm_bufmgr_set_tiling(struct r300_winsys_screen *ws,
     radeon_bo_set_tiling(buf->bo, flags, pitch);
 }
 
-static uint32_t get_gem_domain(enum r300_buffer_domain domain)
-{
-    uint32_t res = 0;
-
-    if (domain & R300_DOMAIN_GTT)
-        res |= RADEON_GEM_DOMAIN_GTT;
-    if (domain & R300_DOMAIN_VRAM)
-        res |= RADEON_GEM_DOMAIN_VRAM;
-    return res;
-}
-
-void radeon_drm_bufmgr_add_buffer(struct r300_winsys_cs *rcs,
-                                  struct r300_winsys_cs_buffer *_buf,
-                                  enum r300_buffer_domain rd,
-                                  enum r300_buffer_domain wd)
+static void radeon_drm_bufmgr_add_buffer(struct r300_winsys_cs *rcs,
+                                         struct r300_winsys_cs_buffer *_buf,
+                                         enum r300_buffer_domain rd,
+                                         enum r300_buffer_domain wd)
 {
-    struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs);
+    struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
     struct radeon_bo *bo = (struct radeon_bo*)_buf;
-    uint32_t gem_rd = get_gem_domain(rd);
-    uint32_t gem_wd = get_gem_domain(wd);
 
-    radeon_cs_space_add_persistent_bo(cs->cs, bo, gem_rd, gem_wd);
+    radeon_cs_space_add_persistent_bo(cs->cs, bo, rd, wd);
 }
 
-void radeon_drm_bufmgr_write_reloc(struct r300_winsys_cs *rcs,
-                                   struct r300_winsys_cs_buffer *_buf,
-				   enum r300_buffer_domain rd,
-                                   enum r300_buffer_domain wd)
+static void radeon_drm_bufmgr_write_reloc(struct r300_winsys_cs *rcs,
+                                          struct r300_winsys_cs_buffer *_buf,
+                                          enum r300_buffer_domain rd,
+                                          enum r300_buffer_domain wd)
 {
-    struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs);
+    struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
     struct radeon_bo *bo = (struct radeon_bo*)_buf;
     int retval;
-    uint32_t gem_rd = get_gem_domain(rd);
-    uint32_t gem_wd = get_gem_domain(wd);
 
     cs->cs->cdw = cs->base.cdw;
-    retval = radeon_cs_write_reloc(cs->cs, bo, gem_rd, gem_wd, 0);
+    retval = radeon_cs_write_reloc(cs->cs, bo, rd, wd, 0);
     cs->base.cdw = cs->cs->cdw;
     if (retval) {
         fprintf(stderr, "radeon: Relocation of %p (%d, %d, %d) failed!\n",
-                bo, gem_rd, gem_wd, 0);
+                bo, rd, wd, 0);
     }
 }
 
-struct r300_winsys_cs_buffer *radeon_drm_get_cs_handle(
+static struct r300_winsys_cs_buffer *radeon_drm_get_cs_handle(
         struct r300_winsys_screen *rws,
         struct r300_winsys_buffer *_buf)
 {
@@ -518,11 +501,11 @@ struct r300_winsys_cs_buffer *radeon_drm_get_cs_handle(
             get_drm_buffer(radeon_pb_buffer(_buf))->bo;
 }
 
-boolean radeon_drm_bufmgr_is_buffer_referenced(struct r300_winsys_cs *rcs,
+static boolean radeon_drm_is_buffer_referenced(struct r300_winsys_cs *rcs,
                                                struct r300_winsys_cs_buffer *_buf,
                                                enum r300_reference_domain domain)
 {
-    struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs);
+    struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
     struct radeon_bo *bo = (struct radeon_bo*)_buf;
     uint32_t tmp;
 
@@ -559,10 +542,23 @@ void radeon_drm_bufmgr_flush_maps(struct pb_manager *_mgr)
     pipe_mutex_unlock(mgr->buffer_map_list_mutex);
 }
 
-void radeon_drm_bufmgr_wait(struct r300_winsys_screen *ws,
-                            struct r300_winsys_buffer *_buf)
+static void radeon_drm_buffer_wait(struct r300_winsys_screen *ws,
+                                   struct r300_winsys_buffer *_buf)
 {
     struct radeon_drm_buffer *buf = get_drm_buffer(radeon_pb_buffer(_buf));
 
     radeon_bo_wait(buf->bo);
 }
+
+void radeon_drm_bufmgr_init_functions(struct radeon_drm_winsys *ws)
+{
+    ws->base.buffer_get_cs_handle = radeon_drm_get_cs_handle;
+    ws->base.buffer_set_tiling = radeon_drm_buffer_set_tiling;
+    ws->base.buffer_get_tiling = radeon_drm_buffer_get_tiling;
+    ws->base.buffer_map = radeon_drm_buffer_map;
+    ws->base.buffer_unmap = radeon_drm_buffer_unmap;
+    ws->base.buffer_wait = radeon_drm_buffer_wait;
+    ws->base.cs_is_buffer_referenced = radeon_drm_is_buffer_referenced;
+    ws->base.cs_add_buffer = radeon_drm_bufmgr_add_buffer;
+    ws->base.cs_write_reloc = radeon_drm_bufmgr_write_reloc;
+}
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_buffer.h b/src/gallium/winsys/radeon/drm/radeon_drm_buffer.h
new file mode 100644
index 00000000000..494abdc0b48
--- /dev/null
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_buffer.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright © 2008 Jérôme Glisse
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
+ * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ */
+/*
+ * Authors:
+ *      Jérôme Glisse <[email protected]>
+ */
+#ifndef RADEON_DRM_BUFFER_H
+#define RADEON_DRM_BUFFER_H
+
+#include "radeon_winsys.h"
+
+#define RADEON_PB_USAGE_VERTEX      (1 << 28)
+#define RADEON_PB_USAGE_DOMAIN_GTT  (1 << 29)
+#define RADEON_PB_USAGE_DOMAIN_VRAM (1 << 30)
+
+static INLINE struct pb_buffer *
+radeon_pb_buffer(struct r300_winsys_buffer *buffer)
+{
+    return (struct pb_buffer *)buffer;
+}
+
+struct pb_manager *radeon_drm_bufmgr_create(struct radeon_drm_winsys *rws);
+struct pb_buffer *radeon_drm_bufmgr_create_buffer_from_handle(struct pb_manager *_mgr,
+							      uint32_t handle);
+void radeon_drm_bufmgr_flush_maps(struct pb_manager *_mgr);
+boolean radeon_drm_bufmgr_get_handle(struct pb_buffer *_buf,
+				     struct winsys_handle *whandle);
+void radeon_drm_bufmgr_init_functions(struct radeon_drm_winsys *ws);
+
+#endif
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm.c b/src/gallium/winsys/radeon/drm/radeon_drm_common.c
index 86d4f949697..6bc6244115c 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_common.c
@@ -29,30 +29,21 @@
  *      Joakim Sindholt <[email protected]>
  */
 
-#include "radeon_drm.h"
-#include "radeon_r300.h"
-#include "radeon_buffer.h"
+#include "radeon_winsys.h"
+#include "radeon_drm_buffer.h"
 #include "radeon_drm_public.h"
 
-#include "r300_winsys.h"
-
+#include "pipebuffer/pb_bufmgr.h"
 #include "util/u_memory.h"
 
-#include "xf86drm.h"
-
-static struct radeon_libdrm_winsys *
-radeon_winsys_create(int fd)
-{
-    struct radeon_libdrm_winsys *rws;
+#include "state_tracker/drm_driver.h"
 
-    rws = CALLOC_STRUCT(radeon_libdrm_winsys);
-    if (rws == NULL) {
-        return NULL;
-    }
+#include <radeon_drm.h>
+#include <radeon_bo_gem.h>
+#include <radeon_cs_gem.h>
+#include <xf86drm.h>
+#include <stdio.h>
 
-    rws->fd = fd;
-    return rws;
-}
 
 /* Enable/disable Hyper-Z access. Return TRUE on success. */
 static boolean radeon_set_hyperz_access(int fd, boolean enable)
@@ -80,7 +71,7 @@ static boolean radeon_set_hyperz_access(int fd, boolean enable)
 }
 
 /* Helper function to do the ioctls needed for setup and init. */
-static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys)
+static void do_ioctls(struct radeon_drm_winsys *winsys)
 {
     struct drm_radeon_gem_info gem_info = {0};
     struct drm_radeon_info info = {0};
@@ -107,7 +98,7 @@ static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys)
      * (see radeon_gem_info_ioctl in radeon_gem.c) but that's alright because
      * we don't actually use the info for anything yet. */
 
-    version = drmGetVersion(fd);
+    version = drmGetVersion(winsys->fd);
     if (version->version_major != 2) {
         fprintf(stderr, "%s: DRM version is %d.%d.%d but this driver is "
                 "only compatible with 2.x.x\n", __FUNCTION__,
@@ -132,7 +123,7 @@ static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys)
                          version->version_minor >= 6);
 
     info.request = RADEON_INFO_DEVICE_ID;
-    retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
+    retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_INFO, &info, sizeof(info));
     if (retval) {
         fprintf(stderr, "%s: Failed to get PCI ID, "
                 "error number %d\n", __FUNCTION__, retval);
@@ -141,7 +132,7 @@ static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys)
     winsys->pci_id = target;
 
     info.request = RADEON_INFO_NUM_GB_PIPES;
-    retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
+    retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_INFO, &info, sizeof(info));
     if (retval) {
         fprintf(stderr, "%s: Failed to get GB pipe count, "
                 "error number %d\n", __FUNCTION__, retval);
@@ -150,7 +141,7 @@ static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys)
     winsys->gb_pipes = target;
 
     info.request = RADEON_INFO_NUM_Z_PIPES;
-    retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
+    retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_INFO, &info, sizeof(info));
     if (retval) {
         fprintf(stderr, "%s: Failed to get Z pipe count, "
                 "error number %d\n", __FUNCTION__, retval);
@@ -158,9 +149,9 @@ static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys)
     }
     winsys->z_pipes = target;
 
-    winsys->hyperz = radeon_set_hyperz_access(fd, TRUE);
+    winsys->hyperz = radeon_set_hyperz_access(winsys->fd, TRUE);
 
-    retval = drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO,
+    retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_GEM_INFO,
             &gem_info, sizeof(gem_info));
     if (retval) {
         fprintf(stderr, "%s: Failed to get MM info, error number %d\n",
@@ -184,29 +175,65 @@ static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys)
     drmFreeVersion(version);
 }
 
-/* Create a pipe_screen. */
-struct r300_winsys_screen* r300_drm_winsys_screen_create(int drmFB)
+static void radeon_winsys_destroy(struct r300_winsys_screen *rws)
+{
+    struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws;
+
+    ws->cman->destroy(ws->cman);
+    ws->kman->destroy(ws->kman);
+
+    radeon_bo_manager_gem_dtor(ws->bom);
+    radeon_cs_manager_gem_dtor(ws->csm);
+    FREE(rws);
+}
+
+struct r300_winsys_screen *r300_drm_winsys_screen_create(int fd)
 {
-    struct radeon_libdrm_winsys* rws; 
-    boolean ret;
-
-    rws = radeon_winsys_create(drmFB);
-    if (!rws)
-	return NULL;
-
-    do_ioctls(drmFB, rws);
-
-    /* The state tracker can organize a softpipe fallback if no hw
-     * driver is found.
-     */
-    if (is_r3xx(rws->pci_id)) {
-        ret = radeon_setup_winsys(drmFB, rws);
-	if (ret == FALSE)
-	    goto fail;
-        return &rws->base;
+    struct radeon_drm_winsys *ws = CALLOC_STRUCT(radeon_drm_winsys);
+    if (!ws) {
+        return NULL;
+    }
+
+    ws->fd = fd;
+    do_ioctls(ws);
+
+    if (!is_r3xx(ws->pci_id)) {
+        goto fail;
     }
 
+    /* Create managers. */
+    ws->bom = radeon_bo_manager_gem_ctor(fd);
+    if (!ws->bom)
+	goto fail;
+    ws->csm = radeon_cs_manager_gem_ctor(fd);
+    if (!ws->csm)
+	goto fail;
+    ws->kman = radeon_drm_bufmgr_create(ws);
+    if (!ws->kman)
+	goto fail;
+    ws->cman = pb_cache_manager_create(ws->kman, 1000000);
+    if (!ws->cman)
+	goto fail;
+
+    /* Set functions. */
+    ws->base.destroy = radeon_winsys_destroy;
+
+    radeon_drm_bufmgr_init_functions(ws);
+    radeon_winsys_init_functions(ws);
+
+    return &ws->base;
+
 fail:
-    FREE(rws);
+    if (ws->bom)
+	radeon_bo_manager_gem_dtor(ws->bom);
+    if (ws->csm)
+	radeon_cs_manager_gem_dtor(ws->csm);
+
+    if (ws->cman)
+	ws->cman->destroy(ws->cman);
+    if (ws->kman)
+	ws->kman->destroy(ws->kman);
+
+    FREE(ws);
     return NULL;
 }
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_public.h b/src/gallium/winsys/radeon/drm/radeon_drm_public.h
index 0d96ae8c470..3a208cdd4c4 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_public.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_public.h
@@ -1,9 +1,222 @@
-
 #ifndef RADEON_DRM_PUBLIC_H
 #define RADEON_DRM_PUBLIC_H
 
+#include "pipe/p_defines.h"
+
 struct r300_winsys_screen;
 
-struct r300_winsys_screen *r300_drm_winsys_screen_create(int drmFD);
+struct r300_winsys_screen *r300_drm_winsys_screen_create(int fd);
+
+static INLINE boolean is_r3xx(int pciid)
+{
+      switch (pciid) {
+      case 0x4144: /* PCI_CHIP_R300_AD */
+      case 0x4145: /* PCI_CHIP_R300_AE */
+      case 0x4146: /* PCI_CHIP_R300_AF */
+      case 0x4147: /* PCI_CHIP_R300_AG */
+      case 0x4E44: /* PCI_CHIP_R300_ND */
+      case 0x4E45: /* PCI_CHIP_R300_NE */
+      case 0x4E46: /* PCI_CHIP_R300_NF */
+      case 0x4E47: /* PCI_CHIP_R300_NG */
+      case 0x4E48: /* PCI_CHIP_R350_NH */
+      case 0x4E49: /* PCI_CHIP_R350_NI */
+      case 0x4E4B: /* PCI_CHIP_R350_NK */
+      case 0x4148: /* PCI_CHIP_R350_AH */
+      case 0x4149: /* PCI_CHIP_R350_AI */
+      case 0x414A: /* PCI_CHIP_R350_AJ */
+      case 0x414B: /* PCI_CHIP_R350_AK */
+      case 0x4E4A: /* PCI_CHIP_R360_NJ */
+      case 0x4150: /* PCI_CHIP_RV350_AP */
+      case 0x4151: /* PCI_CHIP_RV350_AQ */
+      case 0x4152: /* PCI_CHIP_RV350_AR */
+      case 0x4153: /* PCI_CHIP_RV350_AS */
+      case 0x4154: /* PCI_CHIP_RV350_AT */
+      case 0x4155: /* PCI_CHIP_RV350_AU */
+      case 0x4156: /* PCI_CHIP_RV350_AV */
+      case 0x4E50: /* PCI_CHIP_RV350_NP */
+      case 0x4E51: /* PCI_CHIP_RV350_NQ */
+      case 0x4E52: /* PCI_CHIP_RV350_NR */
+      case 0x4E53: /* PCI_CHIP_RV350_NS */
+      case 0x4E54: /* PCI_CHIP_RV350_NT */
+      case 0x4E56: /* PCI_CHIP_RV350_NV */
+      case 0x5460: /* PCI_CHIP_RV370_5460 */
+      case 0x5462: /* PCI_CHIP_RV370_5462 */
+      case 0x5464: /* PCI_CHIP_RV370_5464 */
+      case 0x5B60: /* PCI_CHIP_RV370_5B60 */
+      case 0x5B62: /* PCI_CHIP_RV370_5B62 */
+      case 0x5B63: /* PCI_CHIP_RV370_5B63 */
+      case 0x5B64: /* PCI_CHIP_RV370_5B64 */
+      case 0x5B65: /* PCI_CHIP_RV370_5B65 */
+      case 0x3150: /* PCI_CHIP_RV380_3150 */
+      case 0x3152: /* PCI_CHIP_RV380_3152 */
+      case 0x3154: /* PCI_CHIP_RV380_3154 */
+      case 0x3155: /* PCI_CHIP_RV380_3155 */
+      case 0x3E50: /* PCI_CHIP_RV380_3E50 */
+      case 0x3E54: /* PCI_CHIP_RV380_3E54 */
+      case 0x4A48: /* PCI_CHIP_R420_JH */
+      case 0x4A49: /* PCI_CHIP_R420_JI */
+      case 0x4A4A: /* PCI_CHIP_R420_JJ */
+      case 0x4A4B: /* PCI_CHIP_R420_JK */
+      case 0x4A4C: /* PCI_CHIP_R420_JL */
+      case 0x4A4D: /* PCI_CHIP_R420_JM */
+      case 0x4A4E: /* PCI_CHIP_R420_JN */
+      case 0x4A4F: /* PCI_CHIP_R420_JO */
+      case 0x4A50: /* PCI_CHIP_R420_JP */
+      case 0x4A54: /* PCI_CHIP_R420_JT */
+      case 0x5548: /* PCI_CHIP_R423_UH */
+      case 0x5549: /* PCI_CHIP_R423_UI */
+      case 0x554A: /* PCI_CHIP_R423_UJ */
+      case 0x554B: /* PCI_CHIP_R423_UK */
+      case 0x5550: /* PCI_CHIP_R423_5550 */
+      case 0x5551: /* PCI_CHIP_R423_UQ */
+      case 0x5552: /* PCI_CHIP_R423_UR */
+      case 0x5554: /* PCI_CHIP_R423_UT */
+      case 0x5D57: /* PCI_CHIP_R423_5D57 */
+      case 0x554C: /* PCI_CHIP_R430_554C */
+      case 0x554D: /* PCI_CHIP_R430_554D */
+      case 0x554E: /* PCI_CHIP_R430_554E */
+      case 0x554F: /* PCI_CHIP_R430_554F */
+      case 0x5D48: /* PCI_CHIP_R430_5D48 */
+      case 0x5D49: /* PCI_CHIP_R430_5D49 */
+      case 0x5D4A: /* PCI_CHIP_R430_5D4A */
+      case 0x5D4C: /* PCI_CHIP_R480_5D4C */
+      case 0x5D4D: /* PCI_CHIP_R480_5D4D */
+      case 0x5D4E: /* PCI_CHIP_R480_5D4E */
+      case 0x5D4F: /* PCI_CHIP_R480_5D4F */
+      case 0x5D50: /* PCI_CHIP_R480_5D50 */
+      case 0x5D52: /* PCI_CHIP_R480_5D52 */
+      case 0x4B49: /* PCI_CHIP_R481_4B49 */
+      case 0x4B4A: /* PCI_CHIP_R481_4B4A */
+      case 0x4B4B: /* PCI_CHIP_R481_4B4B */
+      case 0x4B4C: /* PCI_CHIP_R481_4B4C */
+      case 0x564A: /* PCI_CHIP_RV410_564A */
+      case 0x564B: /* PCI_CHIP_RV410_564B */
+      case 0x564F: /* PCI_CHIP_RV410_564F */
+      case 0x5652: /* PCI_CHIP_RV410_5652 */
+      case 0x5653: /* PCI_CHIP_RV410_5653 */
+      case 0x5657: /* PCI_CHIP_RV410_5657 */
+      case 0x5E48: /* PCI_CHIP_RV410_5E48 */
+      case 0x5E4A: /* PCI_CHIP_RV410_5E4A */
+      case 0x5E4B: /* PCI_CHIP_RV410_5E4B */
+      case 0x5E4C: /* PCI_CHIP_RV410_5E4C */
+      case 0x5E4D: /* PCI_CHIP_RV410_5E4D */
+      case 0x5E4F: /* PCI_CHIP_RV410_5E4F */
+      case 0x5A41: /* PCI_CHIP_RS400_5A41 */
+      case 0x5A42: /* PCI_CHIP_RS400_5A42 */
+      case 0x5A61: /* PCI_CHIP_RC410_5A61 */
+      case 0x5A62: /* PCI_CHIP_RC410_5A62 */
+      case 0x5954: /* PCI_CHIP_RS480_5954 */
+      case 0x5955: /* PCI_CHIP_RS480_5955 */
+      case 0x5974: /* PCI_CHIP_RS482_5974 */
+      case 0x5975: /* PCI_CHIP_RS482_5975 */
+      case 0x7100: /* PCI_CHIP_R520_7100 */
+      case 0x7101: /* PCI_CHIP_R520_7101 */
+      case 0x7102: /* PCI_CHIP_R520_7102 */
+      case 0x7103: /* PCI_CHIP_R520_7103 */
+      case 0x7104: /* PCI_CHIP_R520_7104 */
+      case 0x7105: /* PCI_CHIP_R520_7105 */
+      case 0x7106: /* PCI_CHIP_R520_7106 */
+      case 0x7108: /* PCI_CHIP_R520_7108 */
+      case 0x7109: /* PCI_CHIP_R520_7109 */
+      case 0x710A: /* PCI_CHIP_R520_710A */
+      case 0x710B: /* PCI_CHIP_R520_710B */
+      case 0x710C: /* PCI_CHIP_R520_710C */
+      case 0x710E: /* PCI_CHIP_R520_710E */
+      case 0x710F: /* PCI_CHIP_R520_710F */
+      case 0x7140: /* PCI_CHIP_RV515_7140 */
+      case 0x7141: /* PCI_CHIP_RV515_7141 */
+      case 0x7142: /* PCI_CHIP_RV515_7142 */
+      case 0x7143: /* PCI_CHIP_RV515_7143 */
+      case 0x7144: /* PCI_CHIP_RV515_7144 */
+      case 0x7145: /* PCI_CHIP_RV515_7145 */
+      case 0x7146: /* PCI_CHIP_RV515_7146 */
+      case 0x7147: /* PCI_CHIP_RV515_7147 */
+      case 0x7149: /* PCI_CHIP_RV515_7149 */
+      case 0x714A: /* PCI_CHIP_RV515_714A */
+      case 0x714B: /* PCI_CHIP_RV515_714B */
+      case 0x714C: /* PCI_CHIP_RV515_714C */
+      case 0x714D: /* PCI_CHIP_RV515_714D */
+      case 0x714E: /* PCI_CHIP_RV515_714E */
+      case 0x714F: /* PCI_CHIP_RV515_714F */
+      case 0x7151: /* PCI_CHIP_RV515_7151 */
+      case 0x7152: /* PCI_CHIP_RV515_7152 */
+      case 0x7153: /* PCI_CHIP_RV515_7153 */
+      case 0x715E: /* PCI_CHIP_RV515_715E */
+      case 0x715F: /* PCI_CHIP_RV515_715F */
+      case 0x7180: /* PCI_CHIP_RV515_7180 */
+      case 0x7181: /* PCI_CHIP_RV515_7181 */
+      case 0x7183: /* PCI_CHIP_RV515_7183 */
+      case 0x7186: /* PCI_CHIP_RV515_7186 */
+      case 0x7187: /* PCI_CHIP_RV515_7187 */
+      case 0x7188: /* PCI_CHIP_RV515_7188 */
+      case 0x718A: /* PCI_CHIP_RV515_718A */
+      case 0x718B: /* PCI_CHIP_RV515_718B */
+      case 0x718C: /* PCI_CHIP_RV515_718C */
+      case 0x718D: /* PCI_CHIP_RV515_718D */
+      case 0x718F: /* PCI_CHIP_RV515_718F */
+      case 0x7193: /* PCI_CHIP_RV515_7193 */
+      case 0x7196: /* PCI_CHIP_RV515_7196 */
+      case 0x719B: /* PCI_CHIP_RV515_719B */
+      case 0x719F: /* PCI_CHIP_RV515_719F */
+      case 0x7200: /* PCI_CHIP_RV515_7200 */
+      case 0x7210: /* PCI_CHIP_RV515_7210 */
+      case 0x7211: /* PCI_CHIP_RV515_7211 */
+      case 0x71C0: /* PCI_CHIP_RV530_71C0 */
+      case 0x71C1: /* PCI_CHIP_RV530_71C1 */
+      case 0x71C2: /* PCI_CHIP_RV530_71C2 */
+      case 0x71C3: /* PCI_CHIP_RV530_71C3 */
+      case 0x71C4: /* PCI_CHIP_RV530_71C4 */
+      case 0x71C5: /* PCI_CHIP_RV530_71C5 */
+      case 0x71C6: /* PCI_CHIP_RV530_71C6 */
+      case 0x71C7: /* PCI_CHIP_RV530_71C7 */
+      case 0x71CD: /* PCI_CHIP_RV530_71CD */
+      case 0x71CE: /* PCI_CHIP_RV530_71CE */
+      case 0x71D2: /* PCI_CHIP_RV530_71D2 */
+      case 0x71D4: /* PCI_CHIP_RV530_71D4 */
+      case 0x71D5: /* PCI_CHIP_RV530_71D5 */
+      case 0x71D6: /* PCI_CHIP_RV530_71D6 */
+      case 0x71DA: /* PCI_CHIP_RV530_71DA */
+      case 0x71DE: /* PCI_CHIP_RV530_71DE */
+      case 0x7281: /* PCI_CHIP_RV560_7281 */
+      case 0x7283: /* PCI_CHIP_RV560_7283 */
+      case 0x7287: /* PCI_CHIP_RV560_7287 */
+      case 0x7290: /* PCI_CHIP_RV560_7290 */
+      case 0x7291: /* PCI_CHIP_RV560_7291 */
+      case 0x7293: /* PCI_CHIP_RV560_7293 */
+      case 0x7297: /* PCI_CHIP_RV560_7297 */
+      case 0x7280: /* PCI_CHIP_RV570_7280 */
+      case 0x7288: /* PCI_CHIP_RV570_7288 */
+      case 0x7289: /* PCI_CHIP_RV570_7289 */
+      case 0x728B: /* PCI_CHIP_RV570_728B */
+      case 0x728C: /* PCI_CHIP_RV570_728C */
+      case 0x7240: /* PCI_CHIP_R580_7240 */
+      case 0x7243: /* PCI_CHIP_R580_7243 */
+      case 0x7244: /* PCI_CHIP_R580_7244 */
+      case 0x7245: /* PCI_CHIP_R580_7245 */
+      case 0x7246: /* PCI_CHIP_R580_7246 */
+      case 0x7247: /* PCI_CHIP_R580_7247 */
+      case 0x7248: /* PCI_CHIP_R580_7248 */
+      case 0x7249: /* PCI_CHIP_R580_7249 */
+      case 0x724A: /* PCI_CHIP_R580_724A */
+      case 0x724B: /* PCI_CHIP_R580_724B */
+      case 0x724C: /* PCI_CHIP_R580_724C */
+      case 0x724D: /* PCI_CHIP_R580_724D */
+      case 0x724E: /* PCI_CHIP_R580_724E */
+      case 0x724F: /* PCI_CHIP_R580_724F */
+      case 0x7284: /* PCI_CHIP_R580_7284 */
+      case 0x793F: /* PCI_CHIP_RS600_793F */
+      case 0x7941: /* PCI_CHIP_RS600_7941 */
+      case 0x7942: /* PCI_CHIP_RS600_7942 */
+      case 0x791E: /* PCI_CHIP_RS690_791E */
+      case 0x791F: /* PCI_CHIP_RS690_791F */
+      case 0x796C: /* PCI_CHIP_RS740_796C */
+      case 0x796D: /* PCI_CHIP_RS740_796D */
+      case 0x796E: /* PCI_CHIP_RS740_796E */
+      case 0x796F: /* PCI_CHIP_RS740_796F */
+	      return TRUE;
+      default:
+	      return FALSE;
+      }
+}
 
 #endif
diff --git a/src/gallium/winsys/radeon/drm/radeon_r300.c b/src/gallium/winsys/radeon/drm/radeon_r300.c
index 412f3adca46..9f59b3de461 100644
--- a/src/gallium/winsys/radeon/drm/radeon_r300.c
+++ b/src/gallium/winsys/radeon/drm/radeon_r300.c
@@ -20,15 +20,14 @@
  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
 
-#include "radeon_r300.h"
-#include "radeon_buffer.h"
+#include "radeon_drm_buffer.h"
+
+#include "util/u_memory.h"
+#include "pipebuffer/pb_bufmgr.h"
 
-#include "radeon_bo_gem.h"
 #include "radeon_cs_gem.h"
 #include "state_tracker/drm_driver.h"
 
-#include "util/u_memory.h"
-
 static unsigned get_pb_usage_from_create_flags(unsigned bind, unsigned usage,
                                                enum r300_buffer_domain domain)
 {
@@ -73,7 +72,7 @@ radeon_r300_winsys_buffer_create(struct r300_winsys_screen *rws,
                                  unsigned usage,
                                  enum r300_buffer_domain domain)
 {
-    struct radeon_libdrm_winsys *ws = radeon_libdrm_winsys(rws);
+    struct radeon_drm_winsys *ws = radeon_drm_winsys(rws);
     struct pb_desc desc;
     struct pb_manager *provider;
     struct pb_buffer *buffer;
@@ -92,7 +91,7 @@ radeon_r300_winsys_buffer_create(struct r300_winsys_screen *rws,
     if (!buffer)
 	return NULL;
 
-    return radeon_libdrm_winsys_buffer(buffer);
+    return (struct r300_winsys_buffer*)buffer;
 }
 
 static void radeon_r300_winsys_buffer_reference(struct r300_winsys_screen *rws,
@@ -104,7 +103,7 @@ static void radeon_r300_winsys_buffer_reference(struct r300_winsys_screen *rws,
 
     pb_reference(&_dst, _src);
 
-    *pdst = radeon_libdrm_winsys_buffer(_dst);
+    *pdst = (struct r300_winsys_buffer*)_dst;
 }
 
 static struct r300_winsys_buffer *radeon_r300_winsys_buffer_from_handle(struct r300_winsys_screen *rws,
@@ -112,7 +111,7 @@ static struct r300_winsys_buffer *radeon_r300_winsys_buffer_from_handle(struct r
                                                                         unsigned *stride,
                                                                         unsigned *size)
 {
-    struct radeon_libdrm_winsys *ws = radeon_libdrm_winsys(rws);
+    struct radeon_drm_winsys *ws = radeon_drm_winsys(rws);
     struct pb_buffer *_buf;
 
     _buf = radeon_drm_bufmgr_create_buffer_from_handle(ws->kman, whandle->handle);
@@ -122,7 +121,7 @@ static struct r300_winsys_buffer *radeon_r300_winsys_buffer_from_handle(struct r
     if (size)
         *size = _buf->base.size;
 
-    return radeon_libdrm_winsys_buffer(_buf);
+    return (struct r300_winsys_buffer*)_buf;
 }
 
 static boolean radeon_r300_winsys_buffer_get_handle(struct r300_winsys_screen *rws,
@@ -139,7 +138,7 @@ static void radeon_r300_winsys_cs_set_flush(struct r300_winsys_cs *rcs,
                                             void (*flush)(void *),
                                             void *user)
 {
-    struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs);
+    struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
     cs->flush_cs = flush;
     cs->flush_data = user;
     radeon_cs_space_set_flush(cs->cs, flush, user);
@@ -147,20 +146,20 @@ static void radeon_r300_winsys_cs_set_flush(struct r300_winsys_cs *rcs,
 
 static boolean radeon_r300_winsys_cs_validate(struct r300_winsys_cs *rcs)
 {
-    struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs);
+    struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
 
     return radeon_cs_space_check(cs->cs) >= 0;
 }
 
 static void radeon_r300_winsys_cs_reset_buffers(struct r300_winsys_cs *rcs)
 {
-    struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs);
+    struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
     radeon_cs_space_reset_bos(cs->cs);
 }
 
 static void radeon_r300_winsys_cs_flush(struct r300_winsys_cs *rcs)
 {
-    struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs);
+    struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
     int retval;
 
     /* Don't flush a zero-sized CS. */
@@ -190,15 +189,14 @@ static void radeon_r300_winsys_cs_flush(struct r300_winsys_cs *rcs)
      * spinning through one CS while another one is being filled. */
     radeon_cs_erase(cs->cs);
 
-    cs->base.ptr = cs->cs->packets;
+    cs->base.buf = cs->cs->packets;
     cs->base.cdw = cs->cs->cdw;
-    cs->base.ndw = cs->cs->ndw;
 }
 
 static uint32_t radeon_get_value(struct r300_winsys_screen *rws,
                                  enum r300_value_id id)
 {
-    struct radeon_libdrm_winsys *ws = (struct radeon_libdrm_winsys *)rws;
+    struct radeon_drm_winsys *ws = (struct radeon_drm_winsys *)rws;
 
     switch(id) {
     case R300_VID_PCI_ID:
@@ -221,8 +219,8 @@ static uint32_t radeon_get_value(struct r300_winsys_screen *rws,
 
 static struct r300_winsys_cs *radeon_r300_winsys_cs_create(struct r300_winsys_screen *rws)
 {
-    struct radeon_libdrm_winsys *ws = radeon_libdrm_winsys(rws);
-    struct radeon_libdrm_cs *cs = CALLOC_STRUCT(radeon_libdrm_cs);
+    struct radeon_drm_winsys *ws = radeon_drm_winsys(rws);
+    struct radeon_drm_cs *cs = CALLOC_STRUCT(radeon_drm_cs);
 
     if (!cs)
         return NULL;
@@ -240,84 +238,29 @@ static struct r300_winsys_cs *radeon_r300_winsys_cs_create(struct r300_winsys_sc
             RADEON_GEM_DOMAIN_VRAM, ws->vram_size);
 
     cs->ws = ws;
-    cs->base.ptr = cs->cs->packets;
+    cs->base.buf = cs->cs->packets;
     cs->base.cdw = cs->cs->cdw;
-    cs->base.ndw = cs->cs->ndw;
     return &cs->base;
 }
 
 static void radeon_r300_winsys_cs_destroy(struct r300_winsys_cs *rcs)
 {
-    struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs);
+    struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
     radeon_cs_destroy(cs->cs);
     FREE(cs);
 }
 
-static void radeon_winsys_destroy(struct r300_winsys_screen *rws)
-{
-    struct radeon_libdrm_winsys *ws = (struct radeon_libdrm_winsys *)rws;
-
-    ws->cman->destroy(ws->cman);
-    ws->kman->destroy(ws->kman);
-
-    radeon_bo_manager_gem_dtor(ws->bom);
-    radeon_cs_manager_gem_dtor(ws->csm);
-
-    FREE(rws);
-}
-
-boolean radeon_setup_winsys(int fd, struct radeon_libdrm_winsys* ws)
+void radeon_winsys_init_functions(struct radeon_drm_winsys *ws)
 {
-    ws->csm = radeon_cs_manager_gem_ctor(fd);
-    if (!ws->csm)
-	goto fail;
-    ws->bom = radeon_bo_manager_gem_ctor(fd);
-    if (!ws->bom)
-	goto fail;
-    ws->kman = radeon_drm_bufmgr_create(ws);
-    if (!ws->kman)
-	goto fail;
-
-    ws->cman = pb_cache_manager_create(ws->kman, 1000000);
-    if (!ws->cman)
-	goto fail;
-
-    ws->base.destroy = radeon_winsys_destroy;
     ws->base.get_value = radeon_get_value;
-
     ws->base.buffer_create = radeon_r300_winsys_buffer_create;
-    ws->base.buffer_get_cs_handle = radeon_drm_get_cs_handle;
-    ws->base.buffer_set_tiling = radeon_drm_bufmgr_set_tiling;
-    ws->base.buffer_get_tiling = radeon_drm_bufmgr_get_tiling;
-    ws->base.buffer_map = radeon_drm_buffer_map;
-    ws->base.buffer_unmap = radeon_drm_buffer_unmap;
-    ws->base.buffer_wait = radeon_drm_bufmgr_wait;
     ws->base.buffer_reference = radeon_r300_winsys_buffer_reference;
     ws->base.buffer_from_handle = radeon_r300_winsys_buffer_from_handle;
     ws->base.buffer_get_handle = radeon_r300_winsys_buffer_get_handle;
-
     ws->base.cs_create = radeon_r300_winsys_cs_create;
     ws->base.cs_destroy = radeon_r300_winsys_cs_destroy;
-    ws->base.cs_add_buffer = radeon_drm_bufmgr_add_buffer;
     ws->base.cs_validate = radeon_r300_winsys_cs_validate;
-    ws->base.cs_write_reloc = radeon_drm_bufmgr_write_reloc;
     ws->base.cs_flush = radeon_r300_winsys_cs_flush;
     ws->base.cs_reset_buffers = radeon_r300_winsys_cs_reset_buffers;
     ws->base.cs_set_flush = radeon_r300_winsys_cs_set_flush;
-    ws->base.cs_is_buffer_referenced = radeon_drm_bufmgr_is_buffer_referenced;
-    return TRUE;
-
-fail:
-    if (ws->csm)
-	radeon_cs_manager_gem_dtor(ws->csm);
-
-    if (ws->bom)
-	radeon_bo_manager_gem_dtor(ws->bom);
-
-    if (ws->cman)
-	ws->cman->destroy(ws->cman);
-    if (ws->kman)
-	ws->kman->destroy(ws->kman);
-
-    return FALSE;
 }
diff --git a/src/gallium/winsys/radeon/drm/radeon_r300.h b/src/gallium/winsys/radeon/drm/radeon_r300.h
deleted file mode 100644
index 2703464ad8f..00000000000
--- a/src/gallium/winsys/radeon/drm/radeon_r300.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright 2008 Corbin Simpson <[email protected]>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * on the rights to use, copy, modify, merge, publish, distribute, sub
- * license, and/or sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE. */
-
-#ifndef RADEON_R300_H
-#define RADEON_R300_H
-
-#include "radeon_winsys.h"
-
-boolean radeon_setup_winsys(int fd, struct radeon_libdrm_winsys* winsys);
-
-#endif /* RADEON_R300_H */
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index 6f4aa4bce30..81da1a25e0f 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -32,63 +32,37 @@
 
 #include "r300_winsys.h"
 
-struct radeon_libdrm_winsys {
-    /* Parent class. */
+struct radeon_drm_winsys {
     struct r300_winsys_screen base;
 
-    struct pb_manager *kman;
+    int fd; /* DRM file descriptor */
 
+    struct radeon_bo_manager *bom; /* Radeon BO manager. */
+    struct pb_manager *kman;
     struct pb_manager *cman;
 
-    /* PCI ID */
-    uint32_t pci_id;
-
-    /* GB pipe count */
-    uint32_t gb_pipes;
-
-    /* Z pipe count (rv530 only) */
-    uint32_t z_pipes;
-
-    /* GART size. */
-    uint32_t gart_size;
-
-    /* VRAM size. */
-    uint32_t vram_size;
-
-    /* Square tiling support. */
-    boolean squaretiling;
-
-    /* DRM 2.3.0
-     *   - R500 VAP regs
-     *   - MSPOS regs
-     *   - Fixed texture 3D size calculation
-     */
+    uint32_t pci_id;        /* PCI ID */
+    uint32_t gb_pipes;      /* GB pipe count */
+    uint32_t z_pipes;       /* Z pipe count (rv530 only) */
+    uint32_t gart_size;     /* GART size. */
+    uint32_t vram_size;     /* VRAM size. */
+    boolean squaretiling;   /* Square tiling support. */
+    /* DRM 2.3.0 (R500 VAP regs, MSPOS regs, fixed tex3D size checking) */
     boolean drm_2_3_0;
-
-    /* DRM 2.6.0
-     *   - Hyper-Z
-     *   - GB_Z_PEQ_CONFIG allowed on rv350->r4xx, we should initialize it
-     */
+    /* DRM 2.6.0 (Hyper-Z, GB_Z_PEQ_CONFIG allowed on rv350->r4xx) */
     boolean drm_2_6_0;
-
-    /* hyperz user */
+    /* Hyper-Z user */
     boolean hyperz;
 
-    /* DRM FD */
-    int fd;
-
-    /* Radeon BO manager. */
-    struct radeon_bo_manager *bom;
-
     /* Radeon CS manager. */
     struct radeon_cs_manager *csm;
 };
 
-struct radeon_libdrm_cs {
+struct radeon_drm_cs {
     struct r300_winsys_cs base;
 
     /* The winsys. */
-    struct radeon_libdrm_winsys *ws;
+    struct radeon_drm_winsys *ws;
 
     /* The libdrm command stream. */
     struct radeon_cs *cs;
@@ -98,16 +72,18 @@ struct radeon_libdrm_cs {
     void *flush_data;
 };
 
-static INLINE struct radeon_libdrm_cs *
-radeon_libdrm_cs(struct r300_winsys_cs *base)
+static INLINE struct radeon_drm_cs *
+radeon_drm_cs(struct r300_winsys_cs *base)
 {
-    return (struct radeon_libdrm_cs*)base;
+    return (struct radeon_drm_cs*)base;
 }
 
-static INLINE struct radeon_libdrm_winsys *
-radeon_libdrm_winsys(struct r300_winsys_screen *base)
+static INLINE struct radeon_drm_winsys *
+radeon_drm_winsys(struct r300_winsys_screen *base)
 {
-    return (struct radeon_libdrm_winsys*)base;
+    return (struct radeon_drm_winsys*)base;
 }
 
+void radeon_winsys_init_functions(struct radeon_drm_winsys *ws);
+
 #endif