winsys/amdgpu,radeon: pass vm_alignment to buffer_from_handle

Acked-by: Christian König <[email protected]>

2 files changed, 3 insertions, 1 deletions

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index 07a9b2d758e..d1e2a8685ba 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -1134,6 +1134,7 @@ static struct pb_buffer *radeon_winsys_bo_from_ptr(struct radeon_winsys *rws,
 
 static struct pb_buffer *radeon_winsys_bo_from_handle(struct radeon_winsys *rws,
                                                       struct winsys_handle *whandle,
+                                                      unsigned vm_alignment,
                                                       unsigned *stride,
                                                       unsigned *offset)
 {
@@ -1239,7 +1240,7 @@ done:
     if (ws->info.r600_has_virtual_memory && !bo->va) {
         struct drm_radeon_gem_va va;
 
-        bo->va = radeon_bomgr_find_va64(ws, bo->base.size, 1 << 20);
+        bo->va = radeon_bomgr_find_va64(ws, bo->base.size, vm_alignment);
 
         va.handle = bo->handle;
         va.operation = RADEON_VA_MAP;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index cf07a8d8e26..293372cc26d 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -589,6 +589,7 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws)
     /* 2D tiling on CIK is supported since DRM 2.35.0 */
     ws->info.has_2d_tiling = ws->info.chip_class <= SI || ws->info.drm_minor >= 35;
     ws->info.has_read_registers_query = ws->info.drm_minor >= 42;
+    ws->info.max_alignment = 1024*1024;
 
     ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL;