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authorMarek Olšák <[email protected]>2013-11-26 22:59:31 +0100
committerMarek Olšák <[email protected]>2013-12-12 17:26:41 +0100
commit0b37737cc3e7042bffb7c8a0e6a5c822bb806977 (patch)
tree721f0b14cfa702ca7c7e591bb56232514321639c /src/gallium/winsys/radeon/drm
parenta6345f1559300e4eb51a36a1d0f15d6bc8b47dfb (diff)
winsys/radeon: set/get the scanout flag with the tiling ioctls
If we assume that all buffers allocated by the DDX are scanout, a new flag that says "this is not scanout" has to be added to support the non-scanout buffers and maintain backward compatibility. This fixes bad rendering on Wayland. The flag is defined as: #define RADEON_TILING_R600_NO_SCANOUT RADEON_TILING_SWAP_16BIT AFAIK, RADEON_TILING_SWAP_16BIT is not used on SI. Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src/gallium/winsys/radeon/drm')
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_bo.c11
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_winsys.h6
2 files changed, 13 insertions, 4 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index 40ca3e02439..ca569a15d0e 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -744,7 +744,8 @@ static void radeon_bo_get_tiling(struct pb_buffer *_buf,
unsigned *bankw, unsigned *bankh,
unsigned *tile_split,
unsigned *stencil_tile_split,
- unsigned *mtilea)
+ unsigned *mtilea,
+ bool *scanout)
{
struct radeon_bo *bo = get_radeon_bo(_buf);
struct drm_radeon_gem_set_tiling args;
@@ -773,6 +774,8 @@ static void radeon_bo_get_tiling(struct pb_buffer *_buf,
*mtilea = (args.tiling_flags >> RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT) & RADEON_TILING_EG_MACRO_TILE_ASPECT_MASK;
*tile_split = eg_tile_split(*tile_split);
}
+ if (scanout)
+ *scanout = bo->rws->gen >= DRV_SI && !(args.tiling_flags & RADEON_TILING_R600_NO_SCANOUT);
}
static void radeon_bo_set_tiling(struct pb_buffer *_buf,
@@ -783,7 +786,8 @@ static void radeon_bo_set_tiling(struct pb_buffer *_buf,
unsigned tile_split,
unsigned stencil_tile_split,
unsigned mtilea,
- uint32_t pitch)
+ uint32_t pitch,
+ bool scanout)
{
struct radeon_bo *bo = get_radeon_bo(_buf);
struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
@@ -824,6 +828,9 @@ static void radeon_bo_set_tiling(struct pb_buffer *_buf,
args.tiling_flags |= (mtilea & RADEON_TILING_EG_MACRO_TILE_ASPECT_MASK) <<
RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT;
+ if (bo->rws->gen >= DRV_SI && !scanout)
+ args.tiling_flags |= RADEON_TILING_R600_NO_SCANOUT;
+
args.handle = bo->handle;
args.pitch = pitch;
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index d59f48ff3f4..85458c2126e 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -311,7 +311,8 @@ struct radeon_winsys {
unsigned *bankw, unsigned *bankh,
unsigned *tile_split,
unsigned *stencil_tile_split,
- unsigned *mtilea);
+ unsigned *mtilea,
+ bool *scanout);
/**
* Set tiling flags describing a memory layout of a buffer object.
@@ -332,7 +333,8 @@ struct radeon_winsys {
unsigned tile_split,
unsigned stencil_tile_split,
unsigned mtilea,
- unsigned stride);
+ unsigned stride,
+ bool scanout);
/**
* Get a winsys buffer from a winsys handle. The internal structure