diff options
author | Marek Olšák <[email protected]> | 2014-04-12 17:01:52 +0200 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2014-04-16 14:02:51 +0200 |
commit | 70cf6639c331342619e65c46db925d115bf51920 (patch) | |
tree | b20b53d7d4d123cd0b7aeb95c3f6eb04243a70f2 /src/gallium/winsys/radeon/drm | |
parent | 3e9d2cbca2b6b65f302adeadbfc049cc51c14c46 (diff) |
gallium/radeon: create and return a fence in the flush function
All flush functions get a fence parameter. cs_create_fence is removed.
Reviewed-by: Christian König <[email protected]>
Diffstat (limited to 'src/gallium/winsys/radeon/drm')
-rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 10 | ||||
-rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 27 | ||||
-rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_cs.h | 2 | ||||
-rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_winsys.h | 19 |
4 files changed, 36 insertions, 22 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c index e6668930fa9..380316ebd69 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c @@ -405,7 +405,7 @@ static void *radeon_bo_map(struct radeon_winsys_cs_handle *buf, * * Only check whether the buffer is being used for write. */ if (cs && radeon_bo_is_referenced_by_cs_for_write(cs, bo)) { - cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC); + cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC, NULL); return NULL; } @@ -415,7 +415,7 @@ static void *radeon_bo_map(struct radeon_winsys_cs_handle *buf, } } else { if (cs && radeon_bo_is_referenced_by_cs(cs, bo)) { - cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC); + cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC, NULL); return NULL; } @@ -436,7 +436,7 @@ static void *radeon_bo_map(struct radeon_winsys_cs_handle *buf, * * Only check whether the buffer is being used for write. */ if (cs && radeon_bo_is_referenced_by_cs_for_write(cs, bo)) { - cs->flush_cs(cs->flush_data, 0); + cs->flush_cs(cs->flush_data, 0, NULL); } radeon_bo_wait((struct pb_buffer*)bo, RADEON_USAGE_WRITE); @@ -444,7 +444,7 @@ static void *radeon_bo_map(struct radeon_winsys_cs_handle *buf, /* Mapping for write. */ if (cs) { if (radeon_bo_is_referenced_by_cs(cs, bo)) { - cs->flush_cs(cs->flush_data, 0); + cs->flush_cs(cs->flush_data, 0, NULL); } else { /* Try to avoid busy-waiting in radeon_bo_wait. */ if (p_atomic_read(&bo->num_active_ioctls)) @@ -751,7 +751,7 @@ static void radeon_bo_set_tiling(struct pb_buffer *_buf, /* Tiling determines how DRM treats the buffer data. * We must flush CS when changing it if the buffer is referenced. */ if (cs && radeon_bo_is_referenced_by_cs(cs, bo)) { - cs->flush_cs(cs->flush_data, 0); + cs->flush_cs(cs->flush_data, 0, NULL); } while (p_atomic_read(&bo->num_active_ioctls)) { diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c index 91db6b7f365..284a404c997 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c @@ -75,6 +75,11 @@ #define RELOC_DWORDS (sizeof(struct drm_radeon_cs_reloc) / sizeof(uint32_t)) +static struct pipe_fence_handle * +radeon_cs_create_fence(struct radeon_winsys_cs *rcs); +static void radeon_fence_reference(struct pipe_fence_handle **dst, + struct pipe_fence_handle *src); + static boolean radeon_init_cs_context(struct radeon_cs_context *csc, struct radeon_drm_winsys *ws) { @@ -140,7 +145,8 @@ static void radeon_destroy_cs_context(struct radeon_cs_context *csc) static struct radeon_winsys_cs * radeon_drm_cs_create(struct radeon_winsys *rws, enum ring_type ring_type, - void (*flush)(void *ctx, unsigned flags), + void (*flush)(void *ctx, unsigned flags, + struct pipe_fence_handle **fence), void *flush_ctx, struct radeon_winsys_cs_handle *trace_buf) { @@ -349,7 +355,7 @@ static boolean radeon_drm_cs_validate(struct radeon_winsys_cs *rcs) /* Flush if there are any relocs. Clean up otherwise. */ if (cs->csc->crelocs) { - cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC); + cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC, NULL); } else { radeon_cs_context_cleanup(cs->csc); @@ -417,7 +423,10 @@ void radeon_drm_cs_sync_flush(struct radeon_winsys_cs *rcs) DEBUG_GET_ONCE_BOOL_OPTION(noop, "RADEON_NOOP", FALSE) -static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags, uint32_t cs_trace_id) +static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, + unsigned flags, + struct pipe_fence_handle **fence, + uint32_t cs_trace_id) { struct radeon_drm_cs *cs = radeon_drm_cs(rcs); struct radeon_cs_context *tmp; @@ -457,9 +466,14 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags, ui fprintf(stderr, "radeon: command stream overflowed\n"); } + if (fence) { + radeon_fence_reference(fence, NULL); + *fence = radeon_cs_create_fence(rcs); + } + radeon_drm_cs_sync_flush(rcs); - /* Flip command streams. */ + /* Swap command streams. */ tmp = cs->csc; cs->csc = cs->cst; cs->cst = tmp; @@ -468,7 +482,9 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags, ui /* If the CS is not empty or overflowed, emit it in a separate thread. */ if (cs->base.cdw && cs->base.cdw <= RADEON_MAX_CMDBUF_DWORDS && !debug_get_option_noop()) { - unsigned i, crelocs = cs->cst->crelocs; + unsigned i, crelocs; + + crelocs = cs->cst->crelocs; cs->cst->chunks[0].length_dw = cs->base.cdw; @@ -643,7 +659,6 @@ void radeon_drm_cs_init_functions(struct radeon_drm_winsys *ws) ws->base.cs_flush = radeon_drm_cs_flush; ws->base.cs_is_buffer_referenced = radeon_bo_is_referenced; ws->base.cs_sync_flush = radeon_drm_cs_sync_flush; - ws->base.cs_create_fence = radeon_cs_create_fence; ws->base.fence_wait = radeon_fence_wait; ws->base.fence_reference = radeon_fence_reference; } diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.h b/src/gallium/winsys/radeon/drm/radeon_drm_cs.h index 460e9fadc10..59819a56e0a 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.h +++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.h @@ -73,7 +73,7 @@ struct radeon_drm_cs { struct radeon_drm_winsys *ws; /* Flush CS. */ - void (*flush_cs)(void *ctx, unsigned flags); + void (*flush_cs)(void *ctx, unsigned flags, struct pipe_fence_handle **fence); void *flush_data; pipe_semaphore flush_completed; diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h index 469c79beccc..fe0617b682b 100644 --- a/src/gallium/winsys/radeon/drm/radeon_winsys.h +++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h @@ -424,7 +424,8 @@ struct radeon_winsys { */ struct radeon_winsys_cs *(*cs_create)(struct radeon_winsys *ws, enum ring_type ring_type, - void (*flush)(void *ctx, unsigned flags), + void (*flush)(void *ctx, unsigned flags, + struct pipe_fence_handle **fence), void *flush_ctx, struct radeon_winsys_cs_handle *trace_buf); @@ -488,9 +489,14 @@ struct radeon_winsys { * * \param cs A command stream to flush. * \param flags, RADEON_FLUSH_ASYNC or 0. - * \param cs_trace_id A unique identifiant for the cs + * \param fence Pointer to a fence. If non-NULL, a fence is inserted + * after the CS and is returned through this parameter. + * \param cs_trace_id A unique identifier of the cs, used for tracing. */ - void (*cs_flush)(struct radeon_winsys_cs *cs, unsigned flags, uint32_t cs_trace_id); + void (*cs_flush)(struct radeon_winsys_cs *cs, + unsigned flags, + struct pipe_fence_handle **fence, + uint32_t cs_trace_id); /** * Return TRUE if a buffer is referenced by a command stream. @@ -520,13 +526,6 @@ struct radeon_winsys { void (*cs_sync_flush)(struct radeon_winsys_cs *cs); /** - * Return a fence associated with the CS. The fence will be signalled - * once the CS is flushed and all commands in the CS are completed - * by the GPU. - */ - struct pipe_fence_handle *(*cs_create_fence)(struct radeon_winsys_cs *cs); - - /** * Wait for the fence and return true if the fence has been signalled. * The timeout of 0 will only return the status. * The timeout of PIPE_TIMEOUT_INFINITE will always wait until the fence |