aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium/winsys/radeon/drm
diff options
context:
space:
mode:
authorMarek Olšák <[email protected]>2018-04-06 22:26:49 -0400
committerMarek Olšák <[email protected]>2018-04-16 16:58:10 -0400
commit60299e9abe8513b36fe7979fbf36a99e4070e8d1 (patch)
tree046d6bc9f60856b8ec251c6e3f743535a1a23c54 /src/gallium/winsys/radeon/drm
parent692f5507401cfe29bafcaf0a25b87dd2090a1917 (diff)
radeonsi: don't emit partial flushes for internal CS flushes only
Tested-by: Benedikt Schemmer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/winsys/radeon/drm')
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_bo.c12
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_cs.c3
2 files changed, 10 insertions, 5 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index 1617a2fe32e..6652977e586 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -516,7 +516,8 @@ static void *radeon_bo_map(struct pb_buffer *buf,
*
* Only check whether the buffer is being used for write. */
if (cs && radeon_bo_is_referenced_by_cs_for_write(cs, bo)) {
- cs->flush_cs(cs->flush_data, PIPE_FLUSH_ASYNC, NULL);
+ cs->flush_cs(cs->flush_data,
+ RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW, NULL);
return NULL;
}
@@ -526,7 +527,8 @@ static void *radeon_bo_map(struct pb_buffer *buf,
}
} else {
if (cs && radeon_bo_is_referenced_by_cs(cs, bo)) {
- cs->flush_cs(cs->flush_data, PIPE_FLUSH_ASYNC, NULL);
+ cs->flush_cs(cs->flush_data,
+ RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW, NULL);
return NULL;
}
@@ -547,7 +549,8 @@ static void *radeon_bo_map(struct pb_buffer *buf,
*
* Only check whether the buffer is being used for write. */
if (cs && radeon_bo_is_referenced_by_cs_for_write(cs, bo)) {
- cs->flush_cs(cs->flush_data, 0, NULL);
+ cs->flush_cs(cs->flush_data,
+ RADEON_FLUSH_START_NEXT_GFX_IB_NOW, NULL);
}
radeon_bo_wait((struct pb_buffer*)bo, PIPE_TIMEOUT_INFINITE,
RADEON_USAGE_WRITE);
@@ -555,7 +558,8 @@ static void *radeon_bo_map(struct pb_buffer *buf,
/* Mapping for write. */
if (cs) {
if (radeon_bo_is_referenced_by_cs(cs, bo)) {
- cs->flush_cs(cs->flush_data, 0, NULL);
+ cs->flush_cs(cs->flush_data,
+ RADEON_FLUSH_START_NEXT_GFX_IB_NOW, NULL);
} else {
/* Try to avoid busy-waiting in radeon_bo_wait. */
if (p_atomic_read(&bo->num_active_ioctls))
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index a1975dff8df..9070464bec8 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -407,7 +407,8 @@ static bool radeon_drm_cs_validate(struct radeon_winsys_cs *rcs)
/* Flush if there are any relocs. Clean up otherwise. */
if (cs->csc->num_relocs) {
- cs->flush_cs(cs->flush_data, PIPE_FLUSH_ASYNC, NULL);
+ cs->flush_cs(cs->flush_data,
+ RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW, NULL);
} else {
radeon_cs_context_cleanup(cs->csc);
cs->base.used_vram = 0;