diff options
| author | Alex Deucher <[email protected]> | 2011-01-06 18:05:16 -0500 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2011-01-06 18:05:16 -0500 |
| commit | f54366bcf61a414885abb9f7f47e897598a80859 (patch) | |
| tree | 77dcb80e979fb9af7c183ad7502a8e4397e9fd09 /src/gallium/winsys/r600/drm | |
| parent | e31defc825ee94f1d1092e277954abad7097c552 (diff) | |
r600g: add support for NI (Northern Islands) GPUs
This adds support for Barts, Turks, and Caicos asics.
Diffstat (limited to 'src/gallium/winsys/r600/drm')
| -rw-r--r-- | src/gallium/winsys/r600/drm/r600_drm.c | 3 | ||||
| -rw-r--r-- | src/gallium/winsys/r600/drm/radeon_pciid.c | 36 |
2 files changed, 39 insertions, 0 deletions
diff --git a/src/gallium/winsys/r600/drm/r600_drm.c b/src/gallium/winsys/r600/drm/r600_drm.c index 58aacb77c9e..36ec583ccee 100644 --- a/src/gallium/winsys/r600/drm/r600_drm.c +++ b/src/gallium/winsys/r600/drm/r600_drm.c @@ -177,6 +177,9 @@ static struct radeon *radeon_new(int fd, unsigned device) case CHIP_CYPRESS: case CHIP_HEMLOCK: case CHIP_PALM: + case CHIP_BARTS: + case CHIP_TURKS: + case CHIP_CAICOS: radeon->chip_class = EVERGREEN; /* set default group bytes, overridden by tiling info ioctl */ radeon->tiling_info.group_bytes = 512; diff --git a/src/gallium/winsys/r600/drm/radeon_pciid.c b/src/gallium/winsys/r600/drm/radeon_pciid.c index 92560a488ae..e2622abd468 100644 --- a/src/gallium/winsys/r600/drm/radeon_pciid.c +++ b/src/gallium/winsys/r600/drm/radeon_pciid.c @@ -445,6 +445,42 @@ struct pci_id radeon_pci_id[] = { {0x1002, 0x9803, CHIP_PALM}, {0x1002, 0x9804, CHIP_PALM}, {0x1002, 0x9805, CHIP_PALM}, + {0x1002, 0x6720, CHIP_BARTS}, + {0x1002, 0x6721, CHIP_BARTS}, + {0x1002, 0x6722, CHIP_BARTS}, + {0x1002, 0x6723, CHIP_BARTS}, + {0x1002, 0x6724, CHIP_BARTS}, + {0x1002, 0x6725, CHIP_BARTS}, + {0x1002, 0x6726, CHIP_BARTS}, + {0x1002, 0x6727, CHIP_BARTS}, + {0x1002, 0x6728, CHIP_BARTS}, + {0x1002, 0x6729, CHIP_BARTS}, + {0x1002, 0x6738, CHIP_BARTS}, + {0x1002, 0x6739, CHIP_BARTS}, + {0x1002, 0x6740, CHIP_TURKS}, + {0x1002, 0x6741, CHIP_TURKS}, + {0x1002, 0x6742, CHIP_TURKS}, + {0x1002, 0x6743, CHIP_TURKS}, + {0x1002, 0x6744, CHIP_TURKS}, + {0x1002, 0x6745, CHIP_TURKS}, + {0x1002, 0x6746, CHIP_TURKS}, + {0x1002, 0x6747, CHIP_TURKS}, + {0x1002, 0x6748, CHIP_TURKS}, + {0x1002, 0x6749, CHIP_TURKS}, + {0x1002, 0x6750, CHIP_TURKS}, + {0x1002, 0x6758, CHIP_TURKS}, + {0x1002, 0x6759, CHIP_TURKS}, + {0x1002, 0x6760, CHIP_CAICOS}, + {0x1002, 0x6761, CHIP_CAICOS}, + {0x1002, 0x6762, CHIP_CAICOS}, + {0x1002, 0x6763, CHIP_CAICOS}, + {0x1002, 0x6764, CHIP_CAICOS}, + {0x1002, 0x6765, CHIP_CAICOS}, + {0x1002, 0x6766, CHIP_CAICOS}, + {0x1002, 0x6767, CHIP_CAICOS}, + {0x1002, 0x6768, CHIP_CAICOS}, + {0x1002, 0x6770, CHIP_CAICOS}, + {0x1002, 0x6779, CHIP_CAICOS}, {0, 0}, }; |