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authorDave Airlie <[email protected]>2010-10-01 09:43:14 +1000
committerDave Airlie <[email protected]>2010-10-01 10:30:16 +1000
commit05d1d86907b12011fdb80e147ae68b4cd207f789 (patch)
tree96dee679ec69960d4785f7eca705b31830259177 /src/gallium/winsys/r600/drm
parent084c29baedf2702200b310d6e63a5d0f95aaac37 (diff)
r600g: add winsys support for CTL constants.
These need to be emitted, we also need them to do proper vtx start, instead of abusing index offset.
Diffstat (limited to 'src/gallium/winsys/r600/drm')
-rw-r--r--src/gallium/winsys/r600/drm/evergreen_hw_context.c10
-rw-r--r--src/gallium/winsys/r600/drm/r600_hw_context.c9
-rw-r--r--src/gallium/winsys/r600/drm/r600d.h3
3 files changed, 22 insertions, 0 deletions
diff --git a/src/gallium/winsys/r600/drm/evergreen_hw_context.c b/src/gallium/winsys/r600/drm/evergreen_hw_context.c
index a92c32e7df9..225027b8a3e 100644
--- a/src/gallium/winsys/r600/drm/evergreen_hw_context.c
+++ b/src/gallium/winsys/r600/drm/evergreen_hw_context.c
@@ -61,6 +61,11 @@ static const struct r600_reg evergreen_config_reg_list[] = {
{PKT3_SET_CONFIG_REG, EVERGREEN_CONFIG_REG_OFFSET, R_00913C_SPI_CONFIG_CNTL_1, 0, 0},
};
+static const struct r600_reg evergreen_ctl_const_list[] = {
+ {PKT3_SET_CTL_CONST, EVERGREEN_CTL_CONST_OFFSET, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, 0},
+ {PKT3_SET_CTL_CONST, EVERGREEN_CTL_CONST_OFFSET, R_03CFF4_SQ_VTX_START_INST_LOC, 0, 0},
+};
+
static const struct r600_reg evergreen_context_reg_list[] = {
{PKT3_SET_CONTEXT_REG, EVERGREEN_CONTEXT_REG_OFFSET, R_028000_DB_RENDER_CONTROL, 0, 0},
{PKT3_SET_CONTEXT_REG, EVERGREEN_CONTEXT_REG_OFFSET, R_028004_DB_COUNT_CONTROL, 0, 0},
@@ -518,6 +523,11 @@ int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon)
Elements(evergreen_context_reg_list));
if (r)
goto out_err;
+ r = r600_context_add_block(ctx, evergreen_ctl_const_list,
+ Elements(evergreen_ctl_const_list));
+ if (r)
+ goto out_err;
+
/* PS SAMPLER */
for (int j = 0, offset = 0; j < 18; j++, offset += 0xC) {
diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c
index 53783e8f507..88a86d2cf28 100644
--- a/src/gallium/winsys/r600/drm/r600_hw_context.c
+++ b/src/gallium/winsys/r600/drm/r600_hw_context.c
@@ -134,6 +134,11 @@ static const struct r600_reg r600_config_reg_list[] = {
{PKT3_SET_CONFIG_REG, R600_CONFIG_REG_OFFSET, R_009838_DB_WATERMARKS, 0, 0},
};
+static const struct r600_reg r600_ctl_const_list[] = {
+ {PKT3_SET_CTL_CONST, R600_CTL_CONST_OFFSET, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, 0},
+ {PKT3_SET_CTL_CONST, R600_CTL_CONST_OFFSET, R_03CFF4_SQ_VTX_START_INST_LOC, 0, 0},
+};
+
static const struct r600_reg r600_context_reg_list[] = {
{PKT3_SET_CONTEXT_REG, R600_CONTEXT_REG_OFFSET, R_028350_SX_MISC, 0, 0},
{PKT3_SET_CONTEXT_REG, R600_CONTEXT_REG_OFFSET, R_0286C8_SPI_THREAD_GROUPING, 0, 0},
@@ -591,6 +596,10 @@ int r600_context_init(struct r600_context *ctx, struct radeon *radeon)
Elements(r600_context_reg_list));
if (r)
goto out_err;
+ r = r600_context_add_block(ctx, r600_ctl_const_list,
+ Elements(r600_ctl_const_list));
+ if (r)
+ goto out_err;
/* PS SAMPLER BORDER */
for (int j = 0, offset = 0; j < 18; j++, offset += 0x10) {
diff --git a/src/gallium/winsys/r600/drm/r600d.h b/src/gallium/winsys/r600/drm/r600d.h
index 5c08c5a04d1..ccc9ffaf8e3 100644
--- a/src/gallium/winsys/r600/drm/r600d.h
+++ b/src/gallium/winsys/r600/drm/r600d.h
@@ -2205,4 +2205,7 @@
#define R_028940_ALU_CONST_CACHE_PS_0 0x00028940
#define R_028980_ALU_CONST_CACHE_VS_0 0x00028980
+#define R_03CFF0_SQ_VTX_BASE_VTX_LOC 0x03CFF0
+#define R_03CFF4_SQ_VTX_START_INST_LOC 0x03CFF4
+
#endif