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authorChia-I Wu <[email protected]>2014-07-14 10:10:35 +0800
committerChia-I Wu <[email protected]>2014-07-15 12:00:10 +0800
commit81d7f33e30e7f54c5b721085057a53f9cd958fe2 (patch)
treedcb13c9b3379545b2c96d4ace2604c35a1b7105c /src/gallium/winsys/intel
parentd859bdb4b5beee8059d3e5c0f789dd8ae4061c4a (diff)
ilo: move away from drm_intel_bo_alloc_tiled
We want to know the exact sizes of the BOs, and the driver has the knowledge to do so. Refactoring of the resource allocation code is needed though.
Diffstat (limited to 'src/gallium/winsys/intel')
-rw-r--r--src/gallium/winsys/intel/drm/intel_drm_winsys.c68
-rw-r--r--src/gallium/winsys/intel/intel_winsys.h45
2 files changed, 59 insertions, 54 deletions
diff --git a/src/gallium/winsys/intel/drm/intel_drm_winsys.c b/src/gallium/winsys/intel/drm/intel_drm_winsys.c
index 00c4a46c214..b7a2c4ee79b 100644
--- a/src/gallium/winsys/intel/drm/intel_drm_winsys.c
+++ b/src/gallium/winsys/intel/drm/intel_drm_winsys.c
@@ -255,16 +255,37 @@ intel_winsys_read_reg(struct intel_winsys *winsys,
}
struct intel_bo *
-intel_winsys_alloc_buffer(struct intel_winsys *winsys,
- const char *name,
- unsigned long size,
- uint32_t initial_domain)
+intel_winsys_alloc_bo(struct intel_winsys *winsys,
+ const char *name,
+ enum intel_tiling_mode tiling,
+ unsigned long pitch,
+ unsigned long height,
+ uint32_t initial_domain)
{
const bool for_render =
(initial_domain & (INTEL_DOMAIN_RENDER | INTEL_DOMAIN_INSTRUCTION));
- const int alignment = 4096; /* always page-aligned */
+ const unsigned int alignment = 4096; /* always page-aligned */
+ unsigned long size;
drm_intel_bo *bo;
+ switch (tiling) {
+ case INTEL_TILING_X:
+ if (pitch % 512)
+ return NULL;
+ break;
+ case INTEL_TILING_Y:
+ if (pitch % 128)
+ return NULL;
+ break;
+ default:
+ break;
+ }
+
+ if (pitch > ULONG_MAX / height)
+ return NULL;
+
+ size = pitch * height;
+
if (for_render) {
bo = drm_intel_bo_alloc_for_render(winsys->bufmgr,
name, size, alignment);
@@ -273,32 +294,16 @@ intel_winsys_alloc_buffer(struct intel_winsys *winsys,
bo = drm_intel_bo_alloc(winsys->bufmgr, name, size, alignment);
}
- return (struct intel_bo *) bo;
-}
-
-struct intel_bo *
-intel_winsys_alloc_texture(struct intel_winsys *winsys,
- const char *name,
- int width, int height, int cpp,
- enum intel_tiling_mode tiling,
- uint32_t initial_domain,
- unsigned long *pitch)
-{
- const unsigned long flags =
- (initial_domain & (INTEL_DOMAIN_RENDER | INTEL_DOMAIN_INSTRUCTION)) ?
- BO_ALLOC_FOR_RENDER : 0;
- uint32_t real_tiling = tiling;
- drm_intel_bo *bo;
+ if (bo && tiling != INTEL_TILING_NONE) {
+ uint32_t real_tiling = tiling;
+ int err;
- bo = drm_intel_bo_alloc_tiled(winsys->bufmgr, name,
- width, height, cpp, &real_tiling, pitch, flags);
- if (!bo)
- return NULL;
-
- if (real_tiling != tiling) {
- assert(!"tiling mismatch");
- drm_intel_bo_unreference(bo);
- return NULL;
+ err = drm_intel_bo_set_tiling(bo, &real_tiling, pitch);
+ if (err || real_tiling != tiling) {
+ assert(!"tiling mismatch");
+ drm_intel_bo_unreference(bo);
+ return NULL;
+ }
}
return (struct intel_bo *) bo;
@@ -308,7 +313,7 @@ struct intel_bo *
intel_winsys_import_handle(struct intel_winsys *winsys,
const char *name,
const struct winsys_handle *handle,
- int width, int height, int cpp,
+ unsigned long height,
enum intel_tiling_mode *tiling,
unsigned long *pitch)
{
@@ -356,6 +361,7 @@ intel_winsys_export_handle(struct intel_winsys *winsys,
struct intel_bo *bo,
enum intel_tiling_mode tiling,
unsigned long pitch,
+ unsigned long height,
struct winsys_handle *handle)
{
int err = 0;
diff --git a/src/gallium/winsys/intel/intel_winsys.h b/src/gallium/winsys/intel/intel_winsys.h
index 6571719d113..197eae8cd5c 100644
--- a/src/gallium/winsys/intel/intel_winsys.h
+++ b/src/gallium/winsys/intel/intel_winsys.h
@@ -116,36 +116,34 @@ intel_winsys_read_reg(struct intel_winsys *winsys,
uint32_t reg, uint64_t *val);
/**
- * Allocate a linear buffer object.
+ * Allocate a buffer object.
*
* \param name Informative description of the bo.
- * \param size Size of the bo.
+ * \param tiling Tiling mode.
+ * \param pitch Pitch of the bo.
+ * \param height Height of the bo.
* \param initial_domain Initial (write) domain.
*/
struct intel_bo *
-intel_winsys_alloc_buffer(struct intel_winsys *winsys,
- const char *name,
- unsigned long size,
- uint32_t initial_domain);
+intel_winsys_alloc_bo(struct intel_winsys *winsys,
+ const char *name,
+ enum intel_tiling_mode tiling,
+ unsigned long pitch,
+ unsigned long height,
+ uint32_t initial_domain);
/**
- * Allocate a 2-dimentional buffer object.
- *
- * \param name Informative description of the bo.
- * \param width Width of the bo.
- * \param height Height of the bo.
- * \param cpp Bytes per texel.
- * \param tiling Tiling mode.
- * \param initial_domain Initial (write) domain.
- * \param pitch Pitch of the bo.
+ * Allocate a linear buffer object.
*/
-struct intel_bo *
-intel_winsys_alloc_texture(struct intel_winsys *winsys,
- const char *name,
- int width, int height, int cpp,
- enum intel_tiling_mode tiling,
- uint32_t initial_domain,
- unsigned long *pitch);
+static inline struct intel_bo *
+intel_winsys_alloc_buffer(struct intel_winsys *winsys,
+ const char *name,
+ unsigned long size,
+ uint32_t initial_domain)
+{
+ return intel_winsys_alloc_bo(winsys, name,
+ INTEL_TILING_NONE, size, 1, initial_domain);
+}
/**
* Create a bo from a winsys handle.
@@ -154,7 +152,7 @@ struct intel_bo *
intel_winsys_import_handle(struct intel_winsys *winsys,
const char *name,
const struct winsys_handle *handle,
- int width, int height, int cpp,
+ unsigned long height,
enum intel_tiling_mode *tiling,
unsigned long *pitch);
@@ -166,6 +164,7 @@ intel_winsys_export_handle(struct intel_winsys *winsys,
struct intel_bo *bo,
enum intel_tiling_mode tiling,
unsigned long pitch,
+ unsigned long height,
struct winsys_handle *handle);
/**