diff options
author | Chia-I Wu <[email protected]> | 2014-03-08 23:55:15 +0800 |
---|---|---|
committer | Chia-I Wu <[email protected]> | 2014-03-10 16:42:42 +0800 |
commit | 3e324f99d3b8f6b9da00c3f90719fba19e77ae7d (patch) | |
tree | a7070c24cf44c89a2aacef9353da430436d596b4 /src/gallium/winsys/intel/drm/intel_drm_winsys.c | |
parent | 76713ed5d64028a434c15f4eb6572b01e5acacca (diff) |
ilo: replace bo alloc flags by initial domains
The only alloc flag is INTEL_ALLOC_FOR_RENDER, which can as well be expressed
by specifying the initial write domain. The change makes it obvious that we
failed to set INTEL_ALLOC_FOR_RENDER in several places.
Diffstat (limited to 'src/gallium/winsys/intel/drm/intel_drm_winsys.c')
-rw-r--r-- | src/gallium/winsys/intel/drm/intel_drm_winsys.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/src/gallium/winsys/intel/drm/intel_drm_winsys.c b/src/gallium/winsys/intel/drm/intel_drm_winsys.c index 12ae4aae8e2..e119f9ed9a1 100644 --- a/src/gallium/winsys/intel/drm/intel_drm_winsys.c +++ b/src/gallium/winsys/intel/drm/intel_drm_winsys.c @@ -219,17 +219,18 @@ struct intel_bo * intel_winsys_alloc_buffer(struct intel_winsys *winsys, const char *name, unsigned long size, - unsigned long flags) + uint32_t initial_domain) { + const bool for_render = + (initial_domain & (INTEL_DOMAIN_RENDER | INTEL_DOMAIN_INSTRUCTION)); const int alignment = 4096; /* always page-aligned */ drm_intel_bo *bo; - if (flags == INTEL_ALLOC_FOR_RENDER) { + if (for_render) { bo = drm_intel_bo_alloc_for_render(winsys->bufmgr, name, size, alignment); } else { - assert(!flags); bo = drm_intel_bo_alloc(winsys->bufmgr, name, size, alignment); } @@ -241,9 +242,12 @@ intel_winsys_alloc_texture(struct intel_winsys *winsys, const char *name, int width, int height, int cpp, enum intel_tiling_mode tiling, - unsigned long flags, + uint32_t initial_domain, unsigned long *pitch) { + const unsigned long flags = + (initial_domain & (INTEL_DOMAIN_RENDER | INTEL_DOMAIN_INSTRUCTION)) ? + BO_ALLOC_FOR_RENDER : 0; uint32_t real_tiling = tiling; drm_intel_bo *bo; |