radeon: A bit of indent and line break cleanup.

3 files changed, 22 insertions, 15 deletions

diff --git a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c
index 9dca510c815..611ee68da63 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c
+++ b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c
@@ -82,7 +82,8 @@ static struct pipe_buffer *radeon_buffer_user_create(struct pipe_winsys *ws,
 {
     struct radeon_pipe_buffer *radeon_buffer;
 
-    radeon_buffer = (struct radeon_pipe_buffer*)radeon_buffer_create(ws, 0, 0, bytes);
+    radeon_buffer =
+        (struct radeon_pipe_buffer*)radeon_buffer_create(ws, 0, 0, bytes);
     if (radeon_buffer == NULL) {
         return NULL;
     }
@@ -94,7 +95,8 @@ static struct pipe_buffer *radeon_buffer_user_create(struct pipe_winsys *ws,
 
 static void radeon_buffer_del(struct pipe_buffer *buffer)
 {
-    struct radeon_pipe_buffer *radeon_buffer = (struct radeon_pipe_buffer*)buffer;
+    struct radeon_pipe_buffer *radeon_buffer =
+        (struct radeon_pipe_buffer*)buffer;
 
     radeon_bo_unref(radeon_buffer->bo);
     free(radeon_buffer);
@@ -104,7 +106,8 @@ static void *radeon_buffer_map(struct pipe_winsys *ws,
                                struct pipe_buffer *buffer,
                                unsigned flags)
 {
-    struct radeon_pipe_buffer *radeon_buffer = (struct radeon_pipe_buffer*)buffer;
+    struct radeon_pipe_buffer *radeon_buffer =
+        (struct radeon_pipe_buffer*)buffer;
     int write = 0;
 
     if (flags & PIPE_BUFFER_USAGE_DONTBLOCK) {
@@ -120,9 +123,11 @@ static void *radeon_buffer_map(struct pipe_winsys *ws,
     return radeon_buffer->bo->ptr;
 }
 
-static void radeon_buffer_unmap(struct pipe_winsys *ws, struct pipe_buffer *buffer)
+static void radeon_buffer_unmap(struct pipe_winsys *ws,
+                                struct pipe_buffer *buffer)
 {
-    struct radeon_pipe_buffer *radeon_buffer = (struct radeon_pipe_buffer*)buffer;
+    struct radeon_pipe_buffer *radeon_buffer =
+        (struct radeon_pipe_buffer*)buffer;
 
     radeon_bo_unmap(radeon_buffer->bo);
 }
@@ -151,7 +156,7 @@ static void radeon_flush_frontbuffer(struct pipe_winsys *pipe_winsys,
                                      struct pipe_surface *pipe_surface,
                                      void *context_private)
 {
-    /* TODO: call dri2CopyRegion */
+    /* XXX TODO: call dri2CopyRegion */
 }
 
 struct radeon_winsys* radeon_pipe_winsys(int fd)
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_buffer.h b/src/gallium/winsys/drm/radeon/core/radeon_buffer.h
index 40ad0fc8d19..163422f2969 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_buffer.h
+++ b/src/gallium/winsys/drm/radeon/core/radeon_buffer.h
@@ -59,9 +59,10 @@ struct radeon_winsys {
 };
 
 struct radeon_winsys* radeon_pipe_winsys(int fb);
+#if 0
 struct pipe_surface *radeon_surface_from_handle(struct radeon_context *radeon_context,
                                              uint32_t handle,
                                              enum pipe_format format,
                                              int w, int h, int pitch);
-
+#endif
 #endif
diff --git a/src/gallium/winsys/drm/radeon/core/radeon_winsys_softpipe.c b/src/gallium/winsys/drm/radeon/core/radeon_winsys_softpipe.c
index 226e16674c8..33f9ac15ab1 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_winsys_softpipe.c
+++ b/src/gallium/winsys/drm/radeon/core/radeon_winsys_softpipe.c
@@ -39,16 +39,17 @@ struct radeon_softpipe_winsys {
 /**
  * Return list of surface formats supported by this driver.
  */
-static boolean radeon_is_format_supported(struct softpipe_winsys *sws, uint format)
+static boolean radeon_is_format_supported(struct softpipe_winsys *sws,
+                                          uint format)
 {
     switch (format) {
-    case PIPE_FORMAT_A8R8G8B8_UNORM:
-    case PIPE_FORMAT_R5G6B5_UNORM:
-    case PIPE_FORMAT_Z24S8_UNORM:
-        return TRUE;
-    default:
-        break;
-    };
+        case PIPE_FORMAT_A8R8G8B8_UNORM:
+        case PIPE_FORMAT_R5G6B5_UNORM:
+        case PIPE_FORMAT_Z24S8_UNORM:
+            return TRUE;
+        default:
+            break;
+    }
     return FALSE;
 }