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authorRobert Ellison <[email protected]>2008-09-19 01:55:00 -0600
committerRobert Ellison <[email protected]>2008-09-19 01:55:00 -0600
commita57fbe53dcb54694da9c9b4be1533c9d800079d2 (patch)
tree108e10e47981579d1b607b2d61b57acafc2b4561 /src/gallium/winsys/drm/intel
parent984a7c4e9c42cf8ddfcff5b880b522a6dd58bce2 (diff)
CELL: add codegen for logic op, color mask
- rtasm_ppc_spe.c, rtasm_ppc_spe.h: added a new macro function "spe_load_uint" for loading and splatting unsigned integers in a register; it will use "ila" for values 18 bits or less, "ilh" for word values that are symmetric across halfwords, "ilhu" for values that have zeroes in their bottom halfwords, or "ilhu" followed by "iohl" for general 32-bit values. Of the 15 color masks of interest, 4 are 18 bits or less, 2 are symmetric across halfwords, 3 are zero in the bottom halfword, and 6 require two instructions to load. - cell_gen_fragment.c: added full codegen for logic op and color mask.
Diffstat (limited to 'src/gallium/winsys/drm/intel')
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