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authorMarek Olšák <[email protected]>2015-09-02 19:04:25 +0200
committerMarek Olšák <[email protected]>2015-09-10 17:14:15 +0200
commitc6502e880bba00f8a68f004fe6be7a4bc275494a (patch)
tree9c35b0877df9ef702d06a90cd7d50dd0c07eb7ab /src/gallium/winsys/amdgpu
parentadeba943e1d89cba824c054bac6a1b64e415921e (diff)
winsys/amdgpu: calculate the maximum number of compute units
Required for register spilling. Cc: 11.0 <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
Diffstat (limited to 'src/gallium/winsys/amdgpu')
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c15
1 files changed, 13 insertions, 2 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index 875dcd09c6b..c8772490e74 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
@@ -110,7 +110,7 @@ static boolean do_winsys_init(struct amdgpu_winsys *ws)
struct amdgpu_heap_info vram, gtt;
struct drm_amdgpu_info_hw_ip dma = {}, uvd = {}, vce = {};
uint32_t vce_version = 0, vce_feature = 0;
- int r;
+ int r, i, j;
/* Query hardware and driver information. */
r = amdgpu_query_gpu_info(ws->dev, &ws->amdinfo);
@@ -248,7 +248,6 @@ static boolean do_winsys_init(struct amdgpu_winsys *ws)
ws->info.vram_size = vram.heap_size;
/* convert the shader clock from KHz to MHz */
ws->info.max_sclk = ws->amdinfo.max_engine_clk / 1000;
- ws->info.max_compute_units = 1; /* TODO */
ws->info.max_se = ws->amdinfo.num_shader_engines;
ws->info.max_sh_per_se = ws->amdinfo.num_shader_arrays_per_engine;
ws->info.has_uvd = uvd.available_rings != 0;
@@ -263,6 +262,18 @@ static boolean do_winsys_init(struct amdgpu_winsys *ws)
ws->info.r600_virtual_address = TRUE;
ws->info.r600_has_dma = dma.available_rings != 0;
+ /* Guess what the maximum compute unit number is by looking at the mask
+ * of enabled CUs.
+ */
+ for (i = 0; i < ws->info.max_se; i++)
+ for (j = 0; j < ws->info.max_sh_per_se; j++) {
+ unsigned max = util_last_bit(ws->amdinfo.cu_bitmap[i][j]);
+
+ if (ws->info.max_compute_units < max)
+ ws->info.max_compute_units = max;
+ }
+ ws->info.max_compute_units *= ws->info.max_se * ws->info.max_sh_per_se;
+
memcpy(ws->info.si_tile_mode_array, ws->amdinfo.gb_tile_mode,
sizeof(ws->amdinfo.gb_tile_mode));
ws->info.si_tile_mode_array_valid = TRUE;