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authorMarek Olšák <[email protected]>2017-02-27 22:25:43 +0100
committerMarek Olšák <[email protected]>2017-03-31 21:41:57 +0200
commit35aaccaf819db8eb41bcf8e971b54a5885e717d1 (patch)
tree53acf831038cf52ba37ee408b1129cd40a34c4b9 /src/gallium/winsys/amdgpu
parent322eb13f09e0bce7cf6ee92b6b036a1490630ce5 (diff)
radeonsi/gfx9: fix linear mipmap CPU access
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/winsys/amdgpu')
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_surface.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
index 7dfd6d24279..756608793b5 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
@@ -663,7 +663,7 @@ static int gfx9_compute_miptree(struct amdgpu_winsys *ws,
if (in->swizzleMode == ADDR_SW_LINEAR) {
for (unsigned i = 0; i < in->numMipLevels; i++)
- surf->u.gfx9.surf_ymip_offset[i] = mip_info[i].mipOffsetYPixel;
+ surf->u.gfx9.offset[i] = mip_info[i].offset;
}
if (in->flags.depth) {