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authorMarek Olšák <[email protected]>2016-10-24 18:22:31 +0200
committerMarek Olšák <[email protected]>2016-10-26 13:02:58 +0200
commitd18bf0b9441934c5119351b19e628f9e8df0dd3a (patch)
tree2dfd12526e1a37d2085f6d3512ce312062d961a9 /src/gallium/winsys/amdgpu
parentecf045b4f7c83e2ea070e490d9475c2132308ee4 (diff)
gallium/radeon: don't force the same tiling parameters for FMASK
GCN can use a completely different tile mode for FMASK. FMASK allocation now skips one unrelated amdgpu_surface_init codepath as hinted by the assertion. Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/winsys/amdgpu')
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_surface.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
index ff71bcb8b9d..45edcc28734 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
@@ -436,6 +436,8 @@ static int amdgpu_surface_init(struct radeon_winsys *rws,
* for shared resources. This is for 2D tiling only. */
if (AddrSurfInfoIn.tileMode >= ADDR_TM_2D_TILED_THIN1 &&
surf->bankw && surf->bankh && surf->mtilea && surf->tile_split) {
+ assert(!(flags & RADEON_SURF_FMASK));
+
/* If any of these parameters are incorrect, the calculation
* will fail. */
AddrTileInfoIn.banks = surf->num_banks;