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authorMarek Olšák <[email protected]>2016-10-23 16:09:58 +0200
committerMarek Olšák <[email protected]>2016-10-26 13:02:58 +0200
commit7e73ff87c0255a8e0498a47991b640cdece35928 (patch)
tree608d93549bb475029017da6ce7bcf06518f4ab31 /src/gallium/winsys/amdgpu/drm
parentd5c7ea3b83168d8fd77ed4bd834901209e1d47da (diff)
gallium/radeon: remove unnecessary fields from radeon_surf_level
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/winsys/amdgpu/drm')
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_surface.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
index 3b4c13b6baf..e6a26188677 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
@@ -192,15 +192,8 @@ static int compute_level(struct amdgpu_winsys *ws,
surf_level->offset = align64(surf->bo_size, AddrSurfInfoOut->baseAlign);
surf_level->slice_size = AddrSurfInfoOut->sliceSize;
surf_level->pitch_bytes = AddrSurfInfoOut->pitch * (is_stencil ? 1 : surf->bpe);
- surf_level->npix_x = u_minify(tex->width0, level);
- surf_level->npix_y = u_minify(tex->height0, level);
- surf_level->npix_z = u_minify(tex->depth0, level);
surf_level->nblk_x = AddrSurfInfoOut->pitch;
surf_level->nblk_y = AddrSurfInfoOut->height;
- if (tex->target == PIPE_TEXTURE_3D)
- surf_level->nblk_z = AddrSurfInfoOut->depth;
- else
- surf_level->nblk_z = 1;
switch (AddrSurfInfoOut->tileMode) {
case ADDR_TM_LINEAR_ALIGNED: