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authorMarek Olšák <[email protected]>2016-01-30 02:54:47 +0100
committerMarek Olšák <[email protected]>2016-02-05 17:29:19 +0100
commitc577f2843a0341be1091c0eec81704772e667786 (patch)
tree5fff83b107b61077ff8c13eea08749509b024f21 /src/gallium/winsys/amdgpu/drm
parent4f96846d9d96fcb84fb0fb1823b3f59c3c426253 (diff)
gallium/radeon: remove radeon_info::r600_tiling_config
Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src/gallium/winsys/amdgpu/drm')
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c15
1 files changed, 0 insertions, 15 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index c956cf48982..dab27dfba96 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
@@ -92,20 +92,6 @@ static unsigned cik_get_num_tile_pipes(struct amdgpu_gpu_info *info)
}
}
-/* Convert Sea Islands register values GB_ADDR_CFG and MC_ADDR_CFG
- * into GB_TILING_CONFIG register which is only present on R600-R700. */
-static unsigned r600_get_gb_tiling_config(struct amdgpu_gpu_info *info)
-{
- unsigned num_pipes = info->gb_addr_cfg & 0x7;
- unsigned num_banks = info->mc_arb_ramcfg & 0x3;
- unsigned pipe_interleave_bytes = (info->gb_addr_cfg >> 4) & 0x7;
- unsigned row_size = (info->gb_addr_cfg >> 28) & 0x3;
-
- return num_pipes | (num_banks << 4) |
- (pipe_interleave_bytes << 8) |
- (row_size << 12);
-}
-
/* Helper function to do the ioctls needed for setup and init. */
static boolean do_winsys_init(struct amdgpu_winsys *ws)
{
@@ -263,7 +249,6 @@ static boolean do_winsys_init(struct amdgpu_winsys *ws)
ws->info.has_userptr = TRUE;
ws->info.num_render_backends = ws->amdinfo.rb_pipes;
ws->info.clock_crystal_freq = ws->amdinfo.gpu_counter_freq;
- ws->info.r600_tiling_config = r600_get_gb_tiling_config(&ws->amdinfo);
ws->info.num_tile_pipes = cik_get_num_tile_pipes(&ws->amdinfo);
ws->info.pipe_interleave_bytes = 256 << ((ws->amdinfo.gb_addr_cfg >> 4) & 0x7);
ws->info.has_virtual_memory = TRUE;