diff options
author | Sonny Jiang <[email protected]> | 2015-11-12 12:08:31 -0500 |
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committer | Marek Olšák <[email protected]> | 2015-12-07 21:58:42 +0100 |
commit | 676bc2514039f8f631b1fcc0215aaa6647eda946 (patch) | |
tree | 3dc282a9c89ca5b50ab3eb363b162be81b442f31 /src/gallium/winsys/amdgpu/drm/addrlib | |
parent | a2c5200a4b3e04a6284dac7de87bc34957b01fa3 (diff) |
winsys/amdgpu: addrlib - port fix error for workaround for 1D tiling
Signed-off-by: Sonny Jiang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src/gallium/winsys/amdgpu/drm/addrlib')
-rw-r--r-- | src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp b/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp index b1e008b8392..110e3d007b8 100644 --- a/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp +++ b/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp @@ -672,7 +672,7 @@ BOOL_32 EgBasedAddrLib::ComputeSurfaceAlignmentsMicroTiled( if (flags.czDispCompatible) { *pBaseAlign = PowTwoAlign(*pBaseAlign, 4096); //Base address MOD 4096 = 0 - *pPitchAlign = PowTwoAlign(*pPitchAlign, 512 >> (BITS_TO_BYTES(bpp))); //(8 lines * pitch * bytes per pixel) MOD 4096 = 0 + *pPitchAlign = PowTwoAlign(*pPitchAlign, 512 / (BITS_TO_BYTES(bpp))); //(8 lines * pitch * bytes per pixel) MOD 4096 = 0 } // end Carrizo workaround for 1D tilling |