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authorJosé Fonseca <[email protected]>2012-02-20 20:49:03 +0000
committerJosé Fonseca <[email protected]>2012-02-21 08:23:20 +0000
commita206c4cd69a881bf3f8d960607d604b6d53e3a26 (patch)
treee1e18c312b31b5615c30af316505a2f993cde919 /src/gallium/targets/dri-i915
parentd394bc5853f70f5a2d4c4b396e55b96c1ba63be7 (diff)
gallivm: Fix TGSI_OPCODE_ARR's translation.
Like TGSI_OPCODE_ARL, destination should be an integer. This fixes invalid LLVM IR on an internal state tracker (currently Mesa never emits this opcode). In the future consider making ADDR register also a integer-as-float array, like all other register kinds, or simply replace ADDR & ARR/ARL with integer temp and instructions. Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/gallium/targets/dri-i915')
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