diff options
| author | Marek Olšák <[email protected]> | 2017-01-18 22:15:35 +0100 |
|---|---|---|
| committer | Emil Velikov <[email protected]> | 2017-01-20 23:26:03 +0000 |
| commit | b72f8de873be316cd4267547722c07b1cf0f1254 (patch) | |
| tree | c5ca6afb8f63618f8ff312c1939c3f6638b3ba0a /src/gallium/drivers | |
| parent | 1cc5774e5e7b268017af9527c1e1af1185c9745a (diff) | |
radeonsi: don't forget to add HTILE to the buffer list for texturing
This fixes VM faults. Discovered by Samuel Pitoiset.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98975
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99450
Cc: 17.0 13.0 <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Edward O'Callaghan <[email protected]>
(cherry picked from commit e490b7812cae778c61004971d86dc8299b6cd240)
Diffstat (limited to 'src/gallium/drivers')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_descriptors.c | 19 |
1 files changed, 13 insertions, 6 deletions
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index df0905d8977..4a9fcd0dff2 100644 --- a/src/gallium/drivers/radeonsi/si_descriptors.c +++ b/src/gallium/drivers/radeonsi/si_descriptors.c @@ -320,14 +320,21 @@ static void si_sampler_view_add_buffer(struct si_context *sctx, if (resource->target == PIPE_BUFFER) return; - /* Now add separate DCC if it's present. */ + /* Now add separate DCC or HTILE. */ rtex = (struct r600_texture*)resource; - if (!rtex->dcc_separate_buffer) - return; + if (rtex->dcc_separate_buffer) { + radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx, + rtex->dcc_separate_buffer, usage, + RADEON_PRIO_DCC, check_mem); + } - radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx, - rtex->dcc_separate_buffer, usage, - RADEON_PRIO_DCC, check_mem); + if (rtex->htile_buffer && + rtex->tc_compatible_htile && + !is_stencil_sampler) { + radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx, + rtex->htile_buffer, usage, + RADEON_PRIO_HTILE, check_mem); + } } static void si_sampler_views_begin_new_cs(struct si_context *sctx, |