aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers
diff options
context:
space:
mode:
authorEric Anholt <[email protected]>2017-11-01 15:18:34 -0700
committerEric Anholt <[email protected]>2017-11-07 09:19:48 -0800
commit3be820477fbec5e771d6a35148d08a7507533cfd (patch)
tree107da31cb62bd83229b8b66526fbd17c02cb70e6 /src/gallium/drivers
parent3da39f22975703ad3688bfb4b658d219147ce9a1 (diff)
broadcom/vc5: Move stencil state packing to the CSO.
Only the stencil ref comes in as dynamic state at emit time.
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/vc5/vc5_context.h3
-rw-r--r--src/gallium/drivers/vc5/vc5_emit.c36
-rw-r--r--src/gallium/drivers/vc5/vc5_state.c35
3 files changed, 47 insertions, 27 deletions
diff --git a/src/gallium/drivers/vc5/vc5_context.h b/src/gallium/drivers/vc5/vc5_context.h
index 22920278192..dcaf45aee91 100644
--- a/src/gallium/drivers/vc5/vc5_context.h
+++ b/src/gallium/drivers/vc5/vc5_context.h
@@ -394,6 +394,9 @@ struct vc5_depth_stencil_alpha_state {
* Index 2 is the writemask config if it's not a common mask value.
*/
uint32_t stencil_uniforms[3];
+
+ uint8_t stencil_front[8];
+ uint8_t stencil_back[8];
};
#define perf_debug(...) do { \
diff --git a/src/gallium/drivers/vc5/vc5_emit.c b/src/gallium/drivers/vc5/vc5_emit.c
index 06df16730c2..8a606c4990a 100644
--- a/src/gallium/drivers/vc5/vc5_emit.c
+++ b/src/gallium/drivers/vc5/vc5_emit.c
@@ -388,39 +388,21 @@ vc5_emit_state(struct pipe_context *pctx)
}
}
- if (vc5->dirty & (VC5_DIRTY_ZSA | VC5_DIRTY_STENCIL_REF) &&
- vc5->zsa->base.stencil[0].enabled) {
+ if (vc5->dirty & (VC5_DIRTY_ZSA | VC5_DIRTY_STENCIL_REF)) {
struct pipe_stencil_state *front = &vc5->zsa->base.stencil[0];
struct pipe_stencil_state *back = &vc5->zsa->base.stencil[1];
- cl_emit(&job->bcl, STENCIL_CONFIG, config) {
- config.front_config = true;
- config.back_config = !back->enabled;
-
- config.stencil_write_mask = front->writemask;
- config.stencil_test_mask = front->valuemask;
-
- config.stencil_test_function = front->func;
- config.stencil_pass_op = front->zpass_op;
- config.depth_test_fail_op = front->zfail_op;
- config.stencil_test_fail_op = front->fail_op;
-
- config.stencil_ref_value = vc5->stencil_ref.ref_value[0];
+ if (front->enabled) {
+ cl_emit_with_prepacked(&job->bcl, STENCIL_CONFIG,
+ vc5->zsa->stencil_front, config) {
+ config.stencil_ref_value =
+ vc5->stencil_ref.ref_value[1];
+ }
}
if (back->enabled) {
- cl_emit(&job->bcl, STENCIL_CONFIG, config) {
- config.front_config = false;
- config.back_config = true;
-
- config.stencil_write_mask = back->writemask;
- config.stencil_test_mask = back->valuemask;
-
- config.stencil_test_function = back->func;
- config.stencil_pass_op = back->zpass_op;
- config.depth_test_fail_op = back->zfail_op;
- config.stencil_test_fail_op = back->fail_op;
-
+ cl_emit_with_prepacked(&job->bcl, STENCIL_CONFIG,
+ vc5->zsa->stencil_back, config) {
config.stencil_ref_value =
vc5->stencil_ref.ref_value[1];
}
diff --git a/src/gallium/drivers/vc5/vc5_state.c b/src/gallium/drivers/vc5/vc5_state.c
index ed32919f8ae..2a8393e380a 100644
--- a/src/gallium/drivers/vc5/vc5_state.c
+++ b/src/gallium/drivers/vc5/vc5_state.c
@@ -153,6 +153,41 @@ vc5_create_depth_stencil_alpha_state(struct pipe_context *pctx,
cso->stencil[1].zfail_op == PIPE_STENCIL_OP_KEEP))));
}
+ const struct pipe_stencil_state *front = &cso->stencil[0];
+ const struct pipe_stencil_state *back = &cso->stencil[1];
+
+ if (front->enabled) {
+ v3dx_pack(&so->stencil_front, STENCIL_CONFIG, config) {
+ config.front_config = true;
+ /* If !back->enabled, then the front values should be
+ * used for both front and back-facing primitives.
+ */
+ config.back_config = !back->enabled;
+
+ config.stencil_write_mask = front->writemask;
+ config.stencil_test_mask = front->valuemask;
+
+ config.stencil_test_function = front->func;
+ config.stencil_pass_op = front->zpass_op;
+ config.depth_test_fail_op = front->zfail_op;
+ config.stencil_test_fail_op = front->fail_op;
+ }
+ }
+ if (back->enabled) {
+ v3dx_pack(&so->stencil_back, STENCIL_CONFIG, config) {
+ config.front_config = false;
+ config.back_config = true;
+
+ config.stencil_write_mask = back->writemask;
+ config.stencil_test_mask = back->valuemask;
+
+ config.stencil_test_function = back->func;
+ config.stencil_pass_op = back->zpass_op;
+ config.depth_test_fail_op = back->zfail_op;
+ config.stencil_test_fail_op = back->fail_op;
+ }
+ }
+
return so;
}