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authorMarek Olšák <[email protected]>2016-10-10 13:23:55 +0200
committerMarek Olšák <[email protected]>2016-10-11 20:04:57 +0200
commitb425b57d1e215810ac1ddabba62e89c8bd39a453 (patch)
treeea8b9a1a4f2e8906206b6b04c95eaeed7515f508 /src/gallium/drivers
parent9db9c61d2672a10b9bfbfa47e32a15aa67995b8b (diff)
radeonsi: emit TA_CS_BC_BASE_ADDR on SI only if the kernel allows it
Reviewed-by: Edmondo Tommasina <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeonsi/si_compute.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index e59bafeb9b6..632839ff3a5 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -251,7 +251,12 @@ static void si_initialize_compute(struct si_context *sctx)
radeon_emit(cs, bc_va >> 8); /* R_030E00_TA_CS_BC_BASE_ADDR */
radeon_emit(cs, bc_va >> 40); /* R_030E04_TA_CS_BC_BASE_ADDR_HI */
} else {
- radeon_set_config_reg(cs, R_00950C_TA_CS_BC_BASE_ADDR, bc_va >> 8);
+ if (sctx->screen->b.info.drm_major == 3 ||
+ (sctx->screen->b.info.drm_major == 2 &&
+ sctx->screen->b.info.drm_minor >= 48)) {
+ radeon_set_config_reg(cs, R_00950C_TA_CS_BC_BASE_ADDR,
+ bc_va >> 8);
+ }
}
sctx->cs_shader_state.emitted_program = NULL;